TMP112BIDRLR datasheet(21/32 Pages) TI1

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TMP112

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SBOS473F – MARCH 2009 – REVISED FEBRUARY 2018

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(1)

Extended mode 13-bit configuration shown in parenthesis.

7.5.3.8 Alert (AL)

The AL bit is a read-only function. Reading the AL bit provides information about the comparator mode status.

The state of the POL bit inverts the polarity of data returned from the AL bit. When the POL bit equals 0, the AL

bit reads as 1 until the temperature equals or exceeds T(HIGH) for the programmed number of consecutive faults,

causing the AL bit to read as 0. The AL bit continues to read as 0 until the temperature falls below T(LOW) for the

programmed number of consecutive faults, when it again reads as 1. The status of the TM bit does not affect the

status of the AL bit.

7.5.4 High- and Low-Limit Register

The temperature limits are stored in the T(LOW) and T(HIGH) registers in the same format as the temperature result,

and their values are compared to the temperature result on every conversion. The outcome of the comparison

drives the behavior of the ALERT pin, which operates as a comparator output or an interrupt, and is set by the

TM bit in the configuration register.

In Comparator mode (TM = 0), the ALERT pin becomes active when the temperature equals or exceeds the

value in the T(HIGH) register and generates a consecutive number of faults according to fault bits F1 and F0. The

ALERT pin remains active until the temperature falls below the indicated T(LOW) value for the same number of

faults.

In interrupt mode (TM = 1), the ALERT pin becomes active when the temperature equals or exceeds the value in

T(HIGH) for a consecutive number of fault conditions (as shown in Table 11). The ALERT pin remains active until a

read operation of any register occurs, or the device successfully responds to the SMBus alert response address.

The ALERT pin is also cleared if the device is placed in shutdown mode. When the ALERT pin is cleared, it

becomes active again only when temperature falls below T(LOW), and remains active until cleared by a read

operation of any register or a successful response to the SMBus alert response address. When the ALERT pin is

cleared, the above cycle repeats, with the ALERT pin becoming active when the temperature equals or exceeds

T(HIGH). The ALERT pin can also be cleared by resetting the device with the general-call Reset command. This

action also clears the state of the internal registers in the device, returning the device to comparator mode

(TM = 0).

Both operating modes are represented in Figure 16. Table 12 and Table 13 list the format for the THIGH and TLOW

registers. The most significant byte is sent first, followed by the least significant byte. The power-up reset values

for T(HIGH) and T(LOW) are:

•

THIGH = +80°C

•

TLOW = +75°C

The format of the data for THIGH and TLOW is the same as for the Temperature Register.

Table 12. Bytes 1 and 2 of THIGH Register

(1)

BYTE

H11

H10

(H12)

(H11)

(H10)

(H9)

(H8)

(H7)

(H6)

(H5)

BYTE

(H4)

(H3)

(H2)

(H1)

(H0)

(0)

(1)

Extended mode 13-bit configuration shown in parenthesis.

Table 13. Bytes 1 and 2 of TLOW Register

(1)

BYTE

L11

L10

(L12)

(L11)

(L10)

(L9)

(L8)

(L7)

(L6)

(L5)

BYTE

(L4)

(L3)

(L2)

(L1)

(L0)

(0)

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