Preliminary Technical Data

ADCMP572/ADCMP573

Rev. PrB | Page 11 of 16

COMPARATOR HYSTERESIS

The addition of hysteresis to a comparator is often desirable in a

noisy environment or when the differential input amplitudes are

relatively small or slow moving. The transfer function for a

comparator with hysteresis is shown in Figure 16. If the input

voltage approaches the threshold (0.0 V in this example) from

the negative direction, the comparator switches from a low to a

this manner, noise centered on 0.0 V input does not cause the

comparator to switch states unless it exceeds the region

OUTPUT

INPUT

0

2

2

Figure 16. Comparator Hysteresis Transfer Function

The customary technique for introducing hysteresis into a

comparator uses positive feedback from the output back to the

input. A limitation of this approach is that the amount of

hysteresis varies with the output logic levels, resulting in

hysteresis that is not symmetric about the threshold. The

external feedback network can also introduce significant

parasitics that reduce high speed performance, and can even

induce oscillation in some cases.

The ADCMP572/ADCMP573 comparators offer a

programmable hysteresis feature that can significantly improve

the accuracy and stability of the desired hysteresis. By

connecting an external pull-down resistor from the HYS pin to

GND, a variable amount of hysteresis can be applied. Leaving

the HYS pin disconnected disables the feature, and hysteresis is

then less than 1 mV as specified. The maximum hysteresis that

can be applied using this method is approximately ±25 mV.

Figure 17 illustrates the amount of hysteresis applied as a

function of external resistor value. The advantages of applying

hysteresis in this manner are improved accuracy, stability, and

reduced component count. An external bypass capacitor is not

recommended on the HYS pin because it would likely degrade

the jitter performance of the device.

0

10

20

30

40

50

60

23

0

1

456

MINIMUM INPUT SLEW RATE REQUIREMENT

As with all high speed comparators, a minimum slew rate

requirement must be met to ensure that the device does not

oscillate as the input signal crosses the threshold. This

oscillation is due in part to the high input bandwidth of the

comparator and the feedback parasitics inherent in the package.

Analog Devices recommends a minimum slew rate of 50 V/µs

to ensure a clean output transition from the ADCMP572/

ADCMP573 comparators unless hysteresis is programmed as

discussed previously.