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CS5530A 数据表(PDF) 36 Page - National Semiconductor (TI) |
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CS5530A 数据表(HTML) 36 Page - National Semiconductor (TI) |
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36 / 259 page  www.national.com 36 Revision 1.1 Signal Definitions (Continued) IREF (Video DAC) R3 I Analog VDAC Current Reference Input Connect a 680 ohm resistor between this pin and AVSS (analog ground for Video DAC). EXTVREFIN (Video DAC) T2 I Analog External Voltage Reference Pin Connect this pin to a 1.235V voltage reference. AVDD1 (DAC) U1 I Analog Analog Power for Video DAC These pins provide power to the analog portions of the Video DAC. A 47 µF capacitor should be connected between the DAC analog power and DAC analog ground. Analog power is AVDD1 (pin U1) and AVDD3 (pin N4). Analog ground is AVSS1 (pin R2) and AVSS5 (pin P2). AVDD2 (VREF) T3 AVDD3 (DAC) N4 AVSS1 (DAC) R2 I Analog Analog Ground for Video DAC These pins provide the ground plane connections to the analog portions of the Video DAC. A 47 µF capacitor should be connected between the DAC analog power and DAC analog ground. Analog power is AVDD1 (pin U1) and AVDD3 (pin N4). Analog ground is AVSS1 (pin R2) and AVSS5 (pin P2). AVSS2 (ICAP) R4 AVSS3 (VREF) T4 AVSS4 (ICAP) P1 AVSS5 (DAC) P2 IOUTR (Video DAC) P3 O Analog Red DAC Output Red analog output. IOUTG (Video DAC) P4 O Analog Green DAC Output Green analog output. IOUTB (Video DAC) R1 O Analog Blue DAC Output Blue analog output. Display TFT/TV FP_DATA17/ MASTER# F3 O Limited ISA Mode: Flat Panel Data Port Line 17 Refer to FP_DATA[15:0] signal description. I ISA Master Mode: Master Refer to Section 2.2.5 "ISA Bus Interface" on page 28 for this signal’s defini- tion. FP_DATA16/ SA_OE# H3 O Limited ISA Mode: Flat Panel Data Port Line 16 Refer to FP_DATA[15:0] signal description. O ISA Master Mode: System Address Transceiver Output Enable Refer to Section 2.2.5 "ISA Bus Interface" on page 28 for this signal’s defini- tion. 2.2.11 Display Interface (Continued) Signal Name Pin No. Pin Type Description |
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