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ST16654 数据表(PDF) 7 Page - Exar Corporation

部件名 ST16654
功能描述  QUAD UART WITH 64-BYTE FIFO AND INFRARED (IrDA) ENCODER/DECODER
PDF  49 Pages
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制造商  EXAR [Exar Corporation]
网页  http://www.exar.com
标志 EXAR - Exar Corporation

ST16654 数据表(HTML) 7 Page - Exar Corporation

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ST16C654/654D
5-71
Rev. 4.10
SYMBOL DESCRIPTION
dition exists. Interrupt conditions include: receiver errors,
available receiver buffer data, transmit buffer empty, or
when a modem status flag is detected. When the 68 mode
is selected, the functions of these pins are reassigned. 68
mode functions are described under the their respective
name/pin headings.
INTSEL
65
87
-
I
Interrupt Select. (active high, with internal pull-down) - This
function is associated with the 16 mode only. When the 16
mode is selected, this pin can be used in conjunction with
MCR bit-3 to enable or disable the three state interrupts, INT
A-D or override MCR bit-3 and force continuous interrupts.
Interrupt outputs are enabled continuously by making this
pin a logic 1. Making this pin a logic 0 allows MCR bit-3 to
control the three state interrupt output. In this mode, MCR
bit-3 is set to a logic “1” to enable the three state outputs.
This pin is disabled in the 68 mode. Due to pin limitations on
64 pin packages, this pin is not available. To cover this
limitation, two 64 pin QFP package versions are offered.
The ST16C654DCQ64 operates in the continuos interrupt
enable mode by bonded this pin to VCC internally. The
ST16C654CQ64 operates with MCR bit-3 control by bond-
ing this pin to GND.
-IOR
52
66
40
I
Input/Output Read. (active low Strobe) - This function is
associated with the 16 mode only. A logic 0 transition on this
pin will load the contents of an Internal register defined by
address bits A0-A2 onto the ST16C654 data bus (D0-D7) for
access by an external CPU. This pin is disabled in the 68
mode.
-IOW
18
15
9
I
Input/Output Write. (active low strobe) - This function is
associated with the 16 mode only. A logic 0 transition on this
pin will transfer the contents of the data bus (D0-D7) from
the external CPU to an internal register that is defined by
address bits A0/A2. When the 16 mode is selected (68/100
pin devices), this pin functions as R/-W, see definition under
R/W.
-IRQ
15
12
-
O
Interrupt Request or Interrupt “A” - This function is associ-
Symbol
Pin
Signal
Pin Description
68
100
64
type



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