LE A A2A

2008-07-07

11

Zulässige Impulsbelastbarkeit I

Permissible Pulse Handling Capability

2 chips operated parallel; current for single chip is If/2

Zulässige Impulsbelastbarkeit I

Permissible Pulse Handling Capability

T

4 chips operated parallel; current for single chip is If/4

Zulässige Impulsbelastbarkeit I

Permissible Pulse Handling Capability

2 chips operated parallel; current for single chip is If/2

Zulässige Impulsbelastbarkeit I

Permissible Pulse Handling Capability

4 chips operated parallel; current for single chip is If/4

2.6

F

I

A

OHL02598

2.8

3.0

3.2

3.4

3.6

3.8

4.0

4.2

0.5

1.5

2.5

3.5

4.5

6

ms

I

P

t

=

D

T

T

P

t

F

0.5

0.3

0.2

0.1

0.01

0.02

0.05

D

0.005

=

4.5

F

I

A

OHL02602

P

t

=

D

T

P

t

T

6

ms

0.01

0.005

D

0.1

0.05

0.02

=

0.5

0.3

0.2

0.5

1.5

2.5

3.5

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.0

8.5

1.8

F

I

A

OHL02599

0.5

1.5

2.5

3.5

4.5

6

ms

I

P

t

=

D

T

T

P

t

F

0.01

0.02

0.05

D

0.005

=

2.0

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

3.8

4.2

0.1

0.2

0.3

0.5

3.0

F

I

A

OHL02603

P

t

=

D

T

P

t

T

6

ms

0.5

1.5

2.5

3.5

4.5

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.5

0.05

0.3

0.5

0.2

0.1

D

0.005

0.02

0.01

=