MP2145

– 5.5V, 6A, 1.2MHz, COT, BUCK SWITCHER

MP2145 Rev. 1.11

www.MonolithicPower.com

13

12/20/2016

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2016 MPS. All Rights Reserved.

OPERATION

The MP2145 uses constant on-time control with

input voltage feed-forward to stabilize the

switching frequency over its full input Voltage

range. During light loads, the MP2145 employs

a proprietary control over the low-side MOSFET

(LS-FET) and inductor current to improve

efficiency.

Constant-On-Time Control

When

compared

to

fixed-frequency

PWM

control,

constant-on-time

control

offers

a

simpler

control

loop

and

faster

transient

response.

The MP2145’s input-voltage feed-

forward maintains a nearly constant switching

frequency across the entire input and output

voltage range. The on-time of the switching

pulse can be estimated as:

OUT

ON

IN

V

t

0.83 s

V







To prevent inductor current runaway during the

load

transient,

the

MP2145

has

a

fixed

minimum off time of 60ns. However, this

minimum off time limit does not affect the

operation of the MP2145 in steady state in any

way.

Sleep Mode Operation

MP2145 features sleep mode to get high

efficiency at extreme light load. In sleep-mode,

most of the circuit blocks are turned off, except

the error amplifier and PWM comparator, thus

the operation current is reduced to a minimal

value, as Figure 2.

When the loading gets lighter, the ripple of the

output voltage is bigger and it drives the error

amplifier output (EAO) lower. When EAO hits

an internal low threshold, it will be clamped at

that level, MP2145 enters sleep mode. During

sleep mode, the valley of the FB pin voltage is

regulated to the internal reference voltage, thus,

the average output voltage is slightly higher

than the output voltage at DCM or CCM mode.

The on-time pulse at sleep mode is around 40%

larger than that on DCM or CCM mode. Figure

3

shows

the

average

FB

pin

voltage

relationship with the internal reference at sleep

mode.

Bias

&

Voltage

Reference

0.6V

FB

+

+

-

FBCOMP

Soft start

E.A.

+

-

+

Ramp

generator

SW

Lo-Iq

Lo-Iq

Figure 2: Operation Blocks at Sleep Mode

FB

Vref

Average FB

Figure 3: FB Average Voltage at Sleep Mode

When MP2145 is in sleep mode, the average

output voltage is higher than the internal

reference voltage. The EAO is kept low and

clamped in sleep mode. When the loading

increases,

the

PWM

switching

period

decreases in order to keep the output voltage

regulated and the output voltage ripple is

decrease relatively. Once EAO is more than

internal low threshold, MP2145 will be out of

sleep mode and enter DCM or CCM mode

depending on the loading. In DCM or CCM

mode, the EA regulates the average output

voltage to the internal reference which is shown

in Figure 4.

FB+ Ramp

EA out

Average FB= REF

Figure 4: DCM Mode Control

There is always a loading hysteresis of entering

sleep mode and leaving sleep mode due to the

error amplifier clamping response time.