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MP2147GD 数据表(PDF) 17 Page - Monolithic Power Systems |
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MP2147GD 数据表(HTML) 17 Page - Monolithic Power Systems |
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17 / 19 page ![]() MP2147 – 5.5V, 4A, 1.2MHz, COT, BUCK SWITCHER MP2147 Rev. 1.1 www.MonolithicPower.com 17 6/8/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Selecting the Output Capacitor The output capacitor stabilizes the DC output voltage. Ceramic capacitors are recommended. Low ESR capacitors are preferred to limit the output voltage ripple. Estimate the output voltage ripple as: OUT OUT OUT ESR S1 IN S VV 1 V1 R fL V 8 f C2 Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. When using ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and causes most of the output voltage ripple. For simplification, the output voltage ripple can be estimated as: OUT OUT OUT 2 S1 IN VV ΔV1 8f L C2 V For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated as: OUT OUT OUT ESR IN S1 VV ΔV1 R fL V The characteristics of the output capacitor also affect the stability of the regulation system. For MP2147, 2pcs 22uF Co can satisfy the most application. Add Co can reduce DCM and CCM output ripple effectively. However, a very large Co may cause light group pulse in sleep mode. PCB Layout Recommendation Proper layout of the switching power supplies is very important, and sometimes critical to make it work properly. Especially, for the high switching converter, if the layout is not carefully done, the regulator could show poor line or load regulation, stability issues. For MP2147, the high speed step-down regulator, the input capacitor should be placed as close as possible to the IC pins. As shown in Figure 7, the 0805 size ceramic capacitor is used, please make sure the two ends of the ceramic capacitor be directly connected to PIN 8 (the Power Input Pin) and PIN 10/11/12 (the Power GND Pin). Figure 7: Two ends of Input decoupling Capacitor close to Pin 8 and Pin 10/11/12 |
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