Connection Diagram

Top View

20144202

MSOP-8 and MDIP-8

Ordering Information

Order Number

Description

Package Type

Supplied As

LM5021MM-1

80% Duty Cycle Limit

MSOP-8

Available Soon

LM5021MMX-1

80% Duty Cycle Limit

MSOP-8

Available Soon

LM5021NA-1

80% Duty Cycle Limit

MDIP-8

40 Units per Rail

LM5021MM-2

50% Duty Cycle Limit

MSOP-8

Available Soon

LM5021MMX-2

50% Duty Cycle Limit

MSOP-8

Available Soon

LM5021NA-2

50% Duty Cycle Limit

MDIP-8

40 Units per Rail

Pin Description

PIN

NAME

DESCRIPTION

APPLICATION INFORMATION

1

COMP

Control input for the Pulse Width Modulator

and Hiccup comparators.

COMP pull-up is provided by an internal 5K resistor

which may be used to bias an opto-coupler transistor.

2

VIN

Input voltage.

Input to start-up regulator. The VIN pin is clamped at

36V by an internal zener diode.

3

VCC

Output of a linear bias supply regulator.

Nominally 8.5V.

VCC provides bias to controller and gate drive sections

of the LM5021. An external capacitor must be connected

from this pin to ground.

4

OUT

MOSFET gate driver output.

High current output to the external MOSFET gate input

with source/sink current capability of 0.3A and 0.7A

respectively.

5

GND

Ground return.

6

CS

Current Sense input.

Current sense input for current mode control and

over-current protection. Current limiting is accomplished

using a dedicated current sense comparator. If the CS

comparator input exceeds 0.5 Volts the OUT pin

switches low for cycle-by-cycle current limit. CS is held

low for 90ns after OUT switches high to blank the

leading edge current spike.

7

RT / SYNC

Oscillator timing resistor pin and

synchronization input.

An external resistor connected from RT to GND sets the

oscillator frequency. This pin will also accept

synchronization pulses from an external clock.

8

SS

Soft-start / Hiccup time

An external capacitor and an internal 22 µA current

source set the soft-start ramp. The soft -start capacitor

controls both the soft-start rate and the hiccup mode

period.

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