MP6004—PRIMARY-SIDE REGULATED FLYBACK/BUCK 80V DCDC CONVERTER

MP6004 Rev. 1.0

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21

4/14/2015

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6. Use a single point connection between

power GND and signal GND. Vias around

GND

and

the

thermal

pad

are

recommended to lower the die temperature.

Figure 8—Recommended flyback layout

For buck application:

1. Keep the input loop as short as possible

between the input capacitor, rectifier diode,

SW, and GND plane for minimal noise and

ringing.

2. Keep the output loop between the rectifier

diode, the output capacitor, and the inductor

as short as possible.

3. Place the VCC capacitor close to VCC for

the best decoupling. The current setting

resistor R3 should be placed as close to

ILIM and AGND as possible.

4. Connect the output voltage sense and VIN

power supply from the output capacitor with

parallel traces. The feedback trace should

be far away from noise sources (such as

SW). The trace connected to FB2 should be

short.

5. Use a single point connection between

power GND and signal GND. Vias around

GND

and

the

thermal

pad

are

recommended to lower the die temperature.

1

2

1

2

1

2

Top Layer

Bottom Layer

Via

VIN

VINGND

VOUT

VOUTGND

Figure 9—Recommended buck layout

Design Example

Table 1 shows a design example following the

application

guidelines

for

the

following

specifications in flyback applications:

Table 1—Flyback design example

36 V-72 V

12 V

0 A-1 A

Figure 10 shows the detailed application

schematic and is the basis for the typical

performance waveforms. For more detailed

device applications, please refer to the related

evaluation board datasheet.

Table 2 shows a design example following the

application

guidelines

for

the

following

specifications in buck applications:

36 V-72 V

12 V

0 A-1 A

The typical application circuit is shown in Figure

11. For more detailed device applications,

please refer to the related evaluation board

datasheet.