Data Sheet

ADL5321

Figure 36. Evaluation Board Layout and Default Component Placement for

Operation from 2500 MHz to 2700 MHz (Note: C7 Is Not Placed)

Figure 37. Evaluation Board Layout and Component Placement for

Operation from 3400 MHz to 3850 MHz

10µF

C1

1.0 pF

C2

10pF

10 nF

10 pF

9.5 nH

C3

1.2 pF

1

2

(2)

3

10µF

C3

1.2 pF

C1

10 pF

C7

C2

10 pF

10 nF

10 pF

9.5 nH

1

2

(2)

3

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