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STLC2416

the device enters read array mode, but a negative transition of Chip Enable or a change of the address

is required to ensure valid data outputs.

– Vdd Supply Voltage (vddf)

Vdd provides the power supply to the internal core of the flash memory device. It is the main power sup-

ply for all operations (Read, Program and Erase)

– Vddq Supply Voltage (vddq)

Vddq provides the power supply to the I/O pins and enables all Outputs to be powered independently

from Vddf. Vddq can be tied to Vddf or can use separate supply.

– Vpp Program Supply Voltage (vpp)

Vpp is both a control input and a power supply pin. The two functions are selected by the voltage range

applied to the pin. The supply voltage Vddf and the program supply voltage Vpp can be applied in any

order.

If Vpp is kept in a low voltage range (0V to 3.6V) Vpp is seen as a control input. In this case a voltage

lower than 1V gives protection agains program or block erase, while 1.65V<Vpp<3.6V enables these

functions. Vpp is only sampled at the beginning of a program or block erase; a change in its value after

the operation has started does not have any effect and program or erase operations continue.

If Vpp is in the range 11.4V to 12.6V it acts as a power supply pin. In this condition Vpp must be stable

until the Program/Erase algorithm is completed.

– Vssf Flash Ground (vssf)

Vssf is the reference for all voltage measurements.

– Address Inputs (Addr(1-18)/Addr(0-19)), Data Input/Output (Data(0-15)/Data(0-15)), Chip Enable (ne/

csn(0)), Output Enable (ng/rdn), Write Enable (nw/wrn) are connected to and controlled by the Blue-

tooth™ baseband controller.