MP3332

MP3332 Rev. 1.0

www.MonolithicPower.com

21

5/1/2018

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Table 6: Low Battery Voltage Setting Register

Addr: 0x04

Bit

Bit Name

Access

Default

Description

7:5

VBL_RUN

RW

111

Low battery voltage setting bits. If VIN drops below this

voltage during start-up, the current ramping stops. If the

current is decreased during the flash current pulse until

VIN is higher than its threshold, it works only in flash

mode.

000 = 3V; 001 = 3.1V; 110 = 3.6V; 111 = disabled; 0.1V

per step

4

VBL_SD

RW

1

Action in low battery protection and flash mode.

1 = device disabled when VIN is less than the threshold

set by VBL_RUN before flash

0 = enable and current ramps up to current set by I_TX

3:0

IL_DC

RW

0100

Input DC current limit setting bits. 1A to 4.2A.

1A to 3A: 250mA/step, 0000 = 1A; 1000 = 3A;

>3A: 300mA/step, 1001 = 3.3A, 1100 = 4.2A

Table 7: Indicator Register

Addr: 0x05

Bit

Bit Name

Access

Default

Description

7

LED_OTAD

RW

0

Adaptive thermal flash current control bit.

1 = current reduces to the current set by I_TX when Tj >

130°C

0 = disable

6:4

TUP_I

RW

001

Current ramps up time per step.

000 = 8µs; 001 = 7µs, 111 = 1µs/step

3:2

VTH_PAS

RW

01

These two bits define the threshold when Fsw drops to

1MHz or switches to pass mode from boost mode.

00 = 300mV, 01 = 450mV, 10 = 600mV, 11 = 750mV

1:0

INDI_PWM

RW

00

PWM duty cycle of 31.5kHz in indicator mode.

00 = 2/16; 01 = 3/16; 10 = 4/16; 11 = 5/16