MP3398D – 4-STRING, 350MA/STRING, STEP-UP, WHITE LED CONTROLLER

MP3398D Rev. 1.0

www.MonolithicPower.com

16

5/23/2016

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Selecting the Dimming Control Mode

The MP3398D provides two different dimming

methods: direct and analog.

1. Direct PWM Dimming

An external PWM dimming signal is employed to

achieve PWM dimming control. Apply a PWM

dimming signal between 200Hz to 20kHz to

PWM. The minimum recommended amplitude of

the PWM signal is 1.4V, and the low level should

be less than 0.6V (see Table 1).

Table 1: The Range of PWM Dimming Duty

100 < f

≤ 200

0.30%

100%

200 < f

≤ 500

0.75%

100%

500 < f

≤ 1k

1.50%

100%

1k < f

≤ 2k

3.00%

100%

2k < f

≤ 5k

7.50%

100%

5k < f

≤ 10k

15.00%

100%

10k < f

≤ 20k

30.00%

100%

2. Analog Dimming

For analog dimming, apply a PWM signal to

ADIM. An internal RC filter (10M

Ω resistor and

100pF capacitor) is integrated into ADIM. If a

PWM signal is applied to ADIM, use a frequency

greater than 20kHz to achieve a better PWM

signal filtering performance and ensure that the

amplitude voltage is higher than 1.4V and the low

level voltage is less than 0.6V.

Expanding LED Channels

The MP3398D can expand the number of LED

channels by using two or three devices in

parallel. To connect two MP3398D devices for a

total of eight LED strings, tie the VCC pins of the

master IC and the slave IC together to power the

slave IC internal logic circuitry. Tie the COMP

pins of the slave IC and the master IC together to

regulate the voltage of all eight LED strings. The

slave IC MOSFET driving signals are not used;

the boost converter can only be driven by the

master IC. Do not leave ISENSE of the slave IC

floating; tie it to ground. Apply the EN and DIM

signals to both ICs.

PCB Layout Guidelines

Efficient

PCB

layout

is

critical

for

stable

operation. The circuit layout for the MP3398D

requires special attention to reduce EMI noise.

For best results, refer to Figure 3 and follow the

guidelines below.

1. Keep the loop from the external MOSFET

(M1), through the output diode (D1) and the

output capacitor (C2, C3) as small and short

as possible, since it carries a high-frequency

pulse current.

2. Separate the power ground (PGND) and

signal ground (GND).

3. Connect PGND and GND together to reduce

noise. All logic signals refer to the signal

ground.

Figure 3: Layout Consideration