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MP3398E 数据表(PDF) 14 Page - Monolithic Power Systems |
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MP3398E 数据表(HTML) 14 Page - Monolithic Power Systems |
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14 / 17 page ![]() MP3398E – 4-STRING, 80V, STEP-UP, WLED CONTROLLER MP3398E Rev. 1.02 www.MonolithicPower.com 14 7/31/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. The on resistance of the MOSFET determines the conduction loss, which is given by Equation (9): k R I P (on) DS 2 RMS cond (9) Where k is the temperature coefficient of the MOSFET. The switching loss is related to QGD and QGS1, which determine the commutation time. QGS1 is the charge between the threshold voltage and the plateau voltage when a driver charges the gate, which can be read in the VGS vs. QG chart in the MOSFET datasheet. QGD is the charge during the plateau voltage. These two parameters are needed to estimate the turn-on and turn-off losses and can be calculated with Equation (10): SW IN DS PLT DR G GD SW IN DS TH DR G GS1 SW f I V V V R Q f I V V V R Q P (10) Where VTH is the threshold voltage, VPLT is the plateau voltage, VDS is the drain-source voltage, and RG is the gate resistance. RG is recommended to be 10-20 Ω. Please note that calculating the switching loss is the most difficult part of loss estimation. The formula above provides a simplified equation. For more accurate estimates, the equation becomes much more complex. The total gate charge (QG) is used to calculate the gate drive loss and can be calculated with Equation (11): SW DR G DR f V Q P (11) Where VDR is the drive voltage. Selecting the Output Capacitor The output capacitor keeps the output voltage ripple small and ensures feedback loop stability. The output capacitor impedance must be low at the switching frequency. Ceramic capacitors with X7R dielectrics are recommended for their low ESR characteristics. A 4.7 μF ceramic capacitor in parallel with a 22~47 μF electrolytic capacitor is sufficient for most applications. Setting the Over-Voltage Protection (OVP) Open-string protection is achieved through the detection of the voltage on OVP. In some cases, an LED string failure results in the feedback voltage always being zero. The MP3398E continues boosting the output voltage higher and higher. If the output voltage reaches the programmed OVP threshold, the protection is triggered. To ensure that the chip functions properly, an appropriate OVP voltage is required. The recommended OVP point is about 1.1 to 1.2 times higher than the output voltage for normal operation. The OVP voltage is set by an external resistor on OVP and can be calculated with Equation (12): HIGH OVP LOW R V 2(V) (1 ) R (12) Expanding LED Channels The MP3398E can expand the number of LED channels by using two or three ICs in parallel. To connect two ICs for a total of eight LED strings, tie the VCC pins of the master IC and the slave IC together to power the slave IC internal logic circuitry. Tie the COMP pins of the slave IC and the master IC together to regulate the voltage of all eight LED strings. The slave IC MOSFET driving signal is not used; the boost converter can be driven by the master IC only. Do not leave the ISENSE of the slave IC floating; tie it to ground. Apply the EN and DIM signals to both ICs. PCB Layout Guidelines Efficient PCB layout is critical for stable operation and reducing EMI noise. For best results, follow the guidelines below: 1. Ensure that the loop among the external MOSFET, the output diode, and the output ceramic capacitor is as small and short as possible since it carries a high-frequency pulse current. 2. Separate the power ground (PGND) and signal ground (GND) to reduce noise affection. 3. Connect PGND and GND together. All logic signals refer to the signal ground. 4. Place ceramic capacitors as close to VIN and VCC as possible. |
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