LT8331 datasheet(9/30 Pages) LINER

9 / 30 page

LT8331

8331fa

For more information www.linear.com/LT8331

APPLICATIONS INFORMATION

Figure 1. Burst Frequency vs Load Current

ACHIEVING ULTRALOW QUIESCENT CURRENT

To enhance efficiency at light loads the LT8331 uses

a low ripple Burst Mode architecture. This keeps the

output capacitor charged to the desired output voltage

while minimizing the input quiescent current and output

ripple.InBurstModeoperation,theLT8331deliverssingle

small pulses of current to the output capacitor followed

by sleep periods where the output power is supplied by

the output capacitor. While in sleep mode, the LT8331

consumes only 6µA.

As the output load decreases, the frequency of single cur-

rent pulses decreases (see Figure 1) and the percentage of

time the LT8331 is in sleep mode increases, resulting in

much higher light load efficiency than for typical convert-

ers. To optimize the quiescent current performance at light

loads, the current in the feedback resistor divider must be

minimized as it appears to the output as load current. In ad-

dition, all possible leakage currents from the output should

also be minimized as they all add to the equivalent output

load. The largest contributor to leakage current can be due

to the reverse biased leakage of the Schottky diode (see

Diode Selection in the Applications Information section).

While in Burst Mode operation, the current limit of the

switch is approximately 140mA resulting in the output

voltage ripple shown in Figure 2. Increasing the output

capacitance will decrease the output ripple proportionally.

As the output load ramps upward from zero the switching

frequency will increase but only up to the fixed frequency

defined by the resistor at the RT pin as shown in Figure 1.

The output load at which the LT8331 reaches the fixed

Figure 2. Burst Mode Operation

frequency varies based on input voltage, output voltage,

and inductor choice.

PROGRAMMING INPUT TURN-ON AND TURN-OFF

THRESHOLDS WITH EN/UVLO PIN

The EN/UVLO pin voltage controls whether the LT8331 is

enabled or is in a shutdown state. A 1.6V reference and

a comparator A6 with built-in hysteresis (typical 140mV)

allow the user to accurately program the system input

voltage at which the IC turns on and off (see the Block

Diagram). The typical input falling and rising threshold

voltages can be calculated by the following equations:

VIN(FALLING,UVLO(–)) = 1.60 •

R3 + R4

VIN(RISING, UVLO(+)) = 1.74 •

R3 + R4

VIN current is reduced below 1µA when the EN/UVLO pin

voltage is less than 0.2V. The EN/UVLO pin can be con-

nected directly to the input supply VIN for always-enabled

operation. A logic input can also control the EN/UVLO pin.

When operating in Burst Mode operation for light load

currents, the current through the R3 and R4 network can

easily be greater than the supply current consumed by the

LT8331. Therefore, R3 and R4 should be large enough to

minimize their effect on efficiency at light loads.

INTVCC REGULATOR

A low dropout (LDO) linear regulator, supplied from VIN,

produces a 3.2V supply at the INTVCC pin. A minimum

1µF low ESR ceramic capacitor must be used to bypass

the INTVCC pin to ground to supply the high transient cur-

rents required by the internal power MOSFET gate driver.

FRONT PAGE APPLICATION

VIN = 48V, VOUT = 48V

LOAD CURRENT (mA)

100

150

300

450

600

8331 F01

5µs/DIV

VOUT

20mV/DIV

IL1+IL2

100mA/DIV

8331 F02

LT8331 数据表(PDF) 9 Page - Linear Technology

LT8331 数据表(HTML) 9 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

数据表下载