LT8610AX

4

8610axf

For more information www.linear.com/LT8610AX

PIN FUNCTIONS

SYNC (Pin 1): External Clock Synchronization Input.

Ground this pin for low ripple Burst Mode operation at low

output loads. Tie to a clock source for synchronization to

an external frequency. Apply a DC voltage of 3V or higher

Do not float this pin.

TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This

pin allows user control of output voltage ramp rate during

start-up.ATR/SSvoltagebelow0.97VforcestheLT8610AX

to regulate the FB pin to equal the TR/SS pin voltage. When

TR/SS is above 0.97V, the tracking function is disabled

and the internal reference resumes control of the error

this pin allows a capacitor to program output voltage slew

rate. This pin is pulled to ground with an internal 230Ω

MOSFETduringshutdownandfaultconditions;useaseries

resistor if driving from a low impedance output. This pin

may be left floating if the tracking function is not needed.

RT (Pin 3): A resistor is tied between RT and ground to

set the switching frequency.

EN/UV (Pin 4): The LT8610AX is shut down when this

pin is low and active when this pin is high. The hysteretic

threshold voltage is 1.00V going up and 0.96V going

internal circuitry and to the internal topside power switch.

These pins must be tied together and be locally bypassed.

Be sure to place the positive terminal of the input capaci-

capacitor terminal as close as possible to the GND pins.

NC (Pin 7): No Connect. This pin is not connected to

internal circuitry.

SW (Pins 9, 10, 11): The SW pins are the outputs of the

internal power switches. Tie these pins together and con-

nect them to the inductor and boost capacitor. This node

should be kept small on the PCB for good performance.

BST (Pin 12): This pin is used to provide a drive voltage,

higher than the input voltage, to the topside power switch.

Placea0.1µFboostcapacitorascloseaspossibletotheIC.

The internal power drivers and control circuits are pow-

ground with at least a 1μF low ESR ceramic capacitor

placed close to the IC.

BIAS(Pin14):Theinternalregulatorwilldrawcurrentfrom

than 3.1V. For output voltages of 3.3V and above this pin

PG (Pin 15): The PG pin is the open-drain output of an

internal comparator. PG remains low until the FB pin is

within ±9% of the final regulation voltage, and there are

regardless of EN/UV pin state.

FB (Pin 16): The LT8610AX regulates the FB pin to 0.970V.

Connect the feedback resistor divider tap to this pin. Also,

Typically, this capacitor is 4.7pF to 10pF.

GND (Pin 8, Exposed Pad Pin 17): Ground. These pins

are the return path of the internal bottom-side switch and

must be tied together. Place the negative terminal of the

input capacitor as close to the GND pin and exposed pad

as possible. The exposed pad must be soldered to the PCB

in order to lower the thermal resistance.