THCV233-THCV234_Rev.3.10_E

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LVDS Mapping

LVDS data (video data, control data, DE) are mapped as Figure 7. TLC[6] is special bit for DE(data enable), and

TLC[5:4] are for control data bits and the other bits are for video data. Among video data there are special

assigned bit ‘CTL’ are defined for the data transmission under DE=low condition.

The number of LVDS channel depends on color depth mode(COL).

TLD[6] is not available in 24bit Data-width mode.

TLA6

Vdiff = (TLCLK +) - (TLCLK-)

TLA5

TLA4

TLA3

TLA2

TLA1

TLA0

TLA6

TLA5

TLA4

TLA3

TLA2

TLA1

tTCIP

Vdiff = 0V

next cycle

current cycle

TLA2

TLA1

previous cycle

TLB6

TLB5

TLB4

TLB3

TLB2

TLB1

TLB0

TLB6

TLB5

TLB4

TLB3

TLB2

TLB1

TLB2

TLB1

TLC6

(DE)

TLC5

(V)

TLC4

(H)

TLC3

TLC2

TLC1

TLC0

TLC3

TLC2

TLC1

TLC2

TLC1

TLD6

TLD5

TLD4

TLD3

TLD2

TLD1

TLD0

TLD6

TLD5

TLD4

TLD3

TLD2

TLD1

TLD2

TLD1

TLE6

TLE5

TLE4

TLE3

TLE2

TLE1

TLE0

TLE6

TLE5

TLE4

TLE3

TLE2

TLE1

TLE2

TLE1

TLA +/-

TLB +/-

TLC +/-

TLD +/-

TLE +/-

Control data bit

Data Enable

TLC6

(DE)

TLC5

(V)

TLC4

(H)

Data width

32, 24

Figure 7 LVDS Data mapping timing diagram