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DM86LS62 数据表(PDF) 3 Page - National Semiconductor (TI) |
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DM86LS62 数据表(HTML) 3 Page - National Semiconductor (TI) |
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3 / 8 page ![]() Switching Characteristics VCC e 5V and TA e 25 C Symbol Parameter Conditions Min Max Units fMAX Maximum Clock Frequency 25 MHz tPLH Propagation Delay Time Low-to-High-Level 733 ns from Clock to Any Outputs tPHL Propagation Delay Time High-to-Low Level 10 48 ns from Clock to Any Outputs CL e 15 pF RL e 1kX tENABLE Enable Time from Any Control Inputs 5 30 ns tDISABLE Disable Time from Any Control Inputs 6 30 ns tZH Output Enable Time to High Level 5 23 ns tZL Output Enable to Low Level 4 18 ns tHZ Output Disable Time from High Level CL e 5 pF RL e 1kX 523 ns tLZ Output Disable Time from Low Level 6 27 ns Logic Diagram TLF6438 – 2 3 |
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