17

SCDCT1611 Rev A

6,7

TEST

FIFO Loop Tests

A. 1553 Side Loop

NO DMA occurs

B. SUBYSTEM (Microprocessor) Side Loop

1553 Side Set BUSY

FIFO Exercised via

I/O Test Trigger Load Command

and

I/O Test Trigger Unload Command

8

NO OP

NO OPERATION (Wait) when in poll mode (BC).

9

PACT

POLL ACTIVE

PACT = 1 indicates that a POLLING operation has been triggered.

10

DBCACC

RTU Dynamic Bus Controll Acceptance when set in RTU Mode, Rtu will

accept bus control request as per MIL-PRF-1553B

0 = Not Set

1 = Set

11

SSERR

Sets subsystem error flag in returned status word (RTU Mode Only).

12

BUSY

Sets busy bit in returned status word, inhibits DMA (RTU Mode only).

13

TRANSACT

TRANSFER ACTIVITY

TRANSACT = 1 indicates a Transaction has been initiated and is in progress.

14-15

SERVRQ

Sets Service Request in returned status word (RTU Mode only).

Reg. Bit

Name

Definition

Bit 7

Bit 6

Test

0

0

RESET

11

Test A

10

Test B

01

Not Valid

TEST ENABLE

TEST A/B

Bit 15

Bit 14

Flag

0

0

NOT Set

0

1

SET until reset

1

0

Set until VECTOR word is transmitted

1

1

Set until reset *

* Bit 15 is ALWAYS RESET after VECTOR Word is transmitted.

Operation Register con’t