MP7616

2

Rev. 2.00

ORDERING INFORMATION

Package

Type

Temperature

Range

Part No.

Ceramic Dip

MP7616JD

Ceramic Dip

MP7616KD

Ceramic Dip

MP7616TD*

Plastic Dip

MP7616JN

Plastic Dip

MP7616KN

–40 to +85

–40 to +85

–55 to +125

–40 to +85

–40 to +85

+14

+14

+7

+7

+7

+16

+16

+8

+8

+8

+0.8

+0.8

+0.8

+0.8

+0.8

SOIC

MP7616JS

SOIC

MP7616KS

–40 to +85

–40 to +85

+14

+7

+16

+8

+0.8

+0.8

INL

(LSB)

DNL

(LSB)

Gain Error

(% FSR)

*Contact factory for non-compliant military processing

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

22

21

20

19

18

17

16

15

14

13

11

12

22 Pin CDIP, PDIP (0.400”)

D22, N22

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

BIT 10

BIT 11

BIT 12

BIT 13

BIT 2

BIT 1 (MSB)

BIT 16 (LSB)

BIT 15

BIT 14

GND

24 Pin SOIC (Jedec, 0.300”)

S24

BIT 2

BIT 1 (MSB)

BIT 16 (LSB)

BIT 15

BIT 14

GND

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

BIT 10

BIT 11

BIT 12

BIT 13

24

1

13

12

2

3

4

5

6

7

15

14

17

16

8

9

19

18

10

11

23

22

21

20

N/C

N/C

See Packaging Section for Package Dimensions

1

N/C

No Connection

1

2

BIT 3

Data Input Bit 3

2

3

BIT 4

Data Input Bit 4

3

4

BIT 5

Data Input Bit 5

4

5

BIT 6

Data Input Bit 6

5

6

BIT 7

Data Input Bit 7

6

7

BIT 8

Data Input Bit 8

7

8

BIT 9

Data Input Bit 9

8

9

BIT 10

Data Input Bit 10

9

10

BIT 11

Data Input Bit 11

10

11

BIT 12

Data Input Bit 12

11

12

BIT 13

Data Input Bit 13

PIN OUT DEFINITIONS

DIP

NAME

DESCRIPTION

13

N/C

No Connection

12

14

BIT 14

Data Input Bit 14

13

15

BIT 15

Data Input Bit 15

14

16

BIT 16

Data Input Bit 16 (LSB)

15

17

Positive Power Supply

16

18

Reference Input Voltage

17

19

Internal Feedback Resistor

18

20

Current Output 1

19

21

Current Output 2

20

22

GND

Ground

21

23

BIT 1

Data Input Bit 1 (MSB)

22

24

BIT 2

Data Input Bit 2

SOIC

DIP

NAME

DESCRIPTION

SOIC