| 数据搜索系统,热门电子元器件搜索 |
|
CS5484 数据表(PDF) 13 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS5484 数据表(HTML) 13 Page - Cirrus Logic |
|
13 / 67 page ![]() CS5484 DS981F3 13 DIGITAL CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all Recommended Operating Conditions. • Typical characteristics and specifications are measured at nominal supply voltages and TA = 25°C. • VDDA = +3.3V ±10%; GNDA = GNDD = 0V. All voltages with respect to 0V. • MCLK = 4.096MHz. Notes: 11. All measurements performed under static conditions. 12. XOUT pin used for crystal only. Typical drive current<1mA. Parameter Symbol Min Typ Max Unit Master Clock Characteristics XIN Clock Frequency Internal Gate Oscillator MCLK 2.5 4.096 5 MHz Filter Characteristics Phase Compensation Range (60Hz, OWR = 4000Hz) -10.79 - +10.79 ° Input Sampling Rate - MCLK/8 - Hz Digital Filter Output Word Rate (Both channels) OWR - MCLK/1024 - Hz High-pass Filter Corner Frequency -3dB -2.0 - Hz Input/Output Characteristics High-level Input Voltage (All Pins) VIH 0.6(VDDA) - - V Low-level Input Voltage (All Pins) VIL -- 0.6 V High-level Output Voltage DO1-DO4, Iout =+10mA (Note 12) All Other Outputs, Iout =+5mA VOH VDDA-0.3 VDDA-0.3 - - - - V V Low-level Output Voltage DO1-DO4, Iout =-12mA (Note 12) All Other Outputs, Iout =-5mA VOL - - - - 0.5 0.5 V V Input Leakage Current Iin -±1 ±10 µA 3-state Leakage Current IOZ -- ±10 µA Digital Output Pin Capacitance Cout -5 - pF |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |