ST1L04 datasheet(3/11 Pages) STMICROELECTRONICS

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ST1L04

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Figure 3: Typical Application Schematic

NOTE: The adjustable output voltage is set by a resistor divider connected between VO and GND with its centre tap connected to ADJ. The

voltage divider resistor are: R1 connected between VO and ADJ and R2 connected between ADJ and GND. VO is determined by VREF, R1,

R2, IADJ, as follows:

VO=VREF(1+R1/R2)+IADJR1

Since IADJ is very small and stable it can be ignored and the output voltage can be simply calculated as follows:

VO=VREF(1+R1/R2)

Table 5: Electrical Characteristics (refer to the typical application schematic, VIN=from 2.9 to 5.5V, IO=

from 10mA to 1A, CIN=4.7µF, COUT=4.7µF, Tj =0 to 125°C, unless otherwise specified). Typical values

are intended at Tj=25°C unless otherwise specified

NOTE 1: This parameter is the minimum input to output differential voltage required to maintain 1% regulation with respect to the VO nominal

value. For VO between 0.8V and 1.8V included, the Vd value is overridden by the minimum operating input voltage.

NOTE 2: Guaranteed by design. Not tested in production.

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Operating Input Voltage

2.8

Quiescent Current

3mA

VREF

Reference Voltage

TJ = 25°C

0.784

0.8

0.816

0.776

0.8

0.824

∆VO

Line Regulation

IO = 10mA

0.8

∆VO

Load Regulation

VI = 3.3V

0.8

IADJ

Adjustment Current

IO = 10mA

µA

I∆ADJ

Adjustment Current change

200

IOmin

Minimum Output Current for

regulation

100

µA

Output Current Limit

1.4

Dropout Voltage

(see note 1 and note 2)

IO = 1A, VO = from 1.8 to 3.3V

SVR

Supply Voltage Rejection

(see note 2)

VI = 3.3±0.5V,

IO=10mA,

TJ = 25°C

f=120Hz

f=100kHz

Ceramic Output capacitor value

2.2

µF

CESR

Output Capacitor ESR value

200

Ω

Output Noise Voltage (see note 2)

B = from 10Hz to 10kHz,

VI = 3.3V, IO=10mA, Tj=25°C

0.003

%VO

TSH

Thermal shutdown trip point

(see note 2)

VI=3.3V

165

°C

THY

Thermal Shutdown hysteresis

(see note 2)

VI=3.3V

°C

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