PCA2002USLASHAA datasheet(7/20 Pages) PHILIPS

7 / 20 page

2004 Jan 20

Philips Semiconductors

Product speciﬁcation

32 kHz watch circuit with programmable

output period and pulse width

PCA2002

There are four different instruction states:

• State 1; measurement of the crystal oscillator frequency

(divided by 1024)

• State 2; measurement of the inhibition time

• State 3; write/check word A

• State 4; write/check word B.

Each instruction state is switched on with a pulse to

VP(start). After this large pulse, an initial waiting time of t0 is

required. The programming instructions are then entered

by modulating the supply voltage with small pulses of an

amplitude VP(mod) and pulse width tmod. The first small

pulse defines the start time, the following pulses perform

three different functions, depending on the time delay (td)

from the preceding pulse (see Fig.6):

• td =t1 (0.7 ms); increments the instruction counter

• td =t2 (1.7 ms); clocks the shift register with D = 0 at the

input

• td =t3 (2.7 ms); clocks the shift register with D = 1 at the

input.

The programming procedure requires a stable oscillator,

which means that a waiting time, determined by the

start-up time of the oscillator, is necessary after power-up

of the circuit.

After the VP(start) pulse, the instruction counter is in state 1

and the data shift register is cleared. The instruction state

ends with a second pulse to VP(start) or with the pulse to

Vstore. In any event the instruction states are terminated

automatically 2 seconds after the last VP(mod) pulse.

MEASUREMENT OF OSCILLATOR FREQUENCY AND INHIBIT TIME

The output of the two measuring states can either be

monitored directly at pin RESET or as a modulation of the

supply current (a modulating resistor of 30 k

Ω is

connected between VDD and VSS when the signal at pin

RESET is HIGH):

• State 1; crystal oscillator frequency divided by 1024;

state 1 starts with a pulse to VP(start) and ends with a

second pulse to VP(stop)

• State 2; inhibition time (see Fig.7); a frequency with the

period of (31.25 + n

× 0.122) ms appears at pin RESET

and as current modulation at the supply pin.

PROGRAMMING THE MEMORY CELLS

Applying the two-stage programming pulse (see Fig.8)

transfers the stored data in the shift register to the OTP

cells.

Perform the following to programme a memory word:

1. Starting with a VP(start) pulse, wait for the time period t0

then set the instruction counter to the word to be

written (td =t1)

2. Enter the data to be stored into the shift register (td =t2

or t3), LSB first (bit 8) and MSB last (bit 1)

3. Applying the two-stage programming pulse Vpre-store

followed by Vstore stores the word. The delay between

the last data bit and the pre-store pulse Vpre-store is

td =t4. Store the word by raising the supply voltage to

Vstore (9.9 V for 100 ms); the delay between the last

data bit and the store pulse is td =t4 (0.2 ms).

The example shown in Fig.8 performs the following

functions: start, setting the instruction counter to state 4

(word B), entering data word 110101 into the shift register

(sequence: LSB first and MSB last) and writing the OTP

cells for word B.

handbook, halfpage

VDD

VP(start)

VP(mod)

VP(stop)

tp(start)

VSS

VDD(nom)

MGU719

tp(stop)

Fig.6

Supply voltage modulation for start and stop

of instruction state 2.

handbook, halfpage

VDD

31.25 ms + Inhibtion time

VSS

MGU720

Fig.7

Output waveform at pin RESET for

instruction state 2.

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