Data Sheet

21

Rev. 1.0

2016-08-05

TLE8457

LIN Transceiver with integrated Voltage Regulator

General Product Characteristics

5.3

Thermal Characteristics

Note:

This thermal data was generated in accordance with JEDEC JESD51 standards. For more

information, please visit www.jedec.org.

Table 5

1) Not subject to production test, specified by design.

Parameter

Symbol

Values

Unit Note or

Test Condition

Number

Min.

Typ.

Max.

Thermal Resistance, PG-DSO-8 Package Version

Junction ambient

–

130

–

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 μm Cu, 2 x 35 μm

Cu). Where applicable a thermal via array under the exposed pad contacted to the first inner copper layer.

P_5.3.1

Thermal Resistance, PG-TSON-8 Package Version

Junction ambient

–60

–

K/W 2)

P_5.3.2

Junction ambient

–

190

–

3) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board; The product

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1 inner copper layer (1 x 70 μm Cu).

P_5.3.5

Junction ambient

–

70

–

K/W 300mm2 heatsink on

PCB3)

P_5.3.6

Thermal Shutdown Junction Temperature

160

180

200

°C

P_5.3.3

Thermal shutdown hysteresis

ΔT

–10

–

K

P_5.3.4