AS7261N datasheet(13/42 Pages) AMSCO

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[v1-02] 2017-Feb-27

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AS7261N − Detailed Descriptions

Spectral Conversion and Data Acquisition

Spectral conversion uses a register set for integration time

(register INT_T ). If both photodiode banks are required to

complete the conversion, the second bank requires an

additional integration time. Minimum conversion time for a

single bank is 2.8 milliseconds. If data is required from all 6

photodiodes the device must perform 2 full conversions

(2 x integration time). The user has control of gain for the

photodiode current, programmed into bits 0 and 1 of the GAIN_

IDRV register where gain can be set to 1x, 3.7x, 16x or 64x. A

wait time between integration cycles can be programmed into

An auto zero function is automatically performed before the

first data conversion after a power-on or reset, in order to

achieve the best data quality. Auto zero corrects for internal

device temperature. But since it’s automatically done only once,

it can also be manually run. Typically, if the temperature

changes by 15 degrees C or more the auto zero should be

manually run by writing to the Auto_Zero register (temperature

is user calculated based on TMPL & TMPH registers values). But

auto zero can also be manually done before every conversion.

When auto zero function is complete the DONE bit (bit7) of

Auto_Zero register will be set to 1.

The BANK bit (bit7) in the BANK register can be changed as

needed before data conversion to acquire the desired channels.

While conversion is continuous, timing is done using registers.

Both polling and interrupt operation are then supported for

“conversion complete” timing. Both require programming the

INTR_POLL_EN register bit 2 to a 1. The conversion process is

started by writing a 0x01 to the DATA_EN register followed by

clearing any previous Data Valid bit in the INTR_POLL_CLR

DATA_EN register.

If the AS7261N interrupt output is to be used for data

conversion timing the INTR_PIN_Config register should be

programmed to 0xCA. The INT pin will then be asserted high at

the completion of the conversion cycle. A 0x04 should be

written to the INTR_POLL_CLR register to clear this interrupt

which also clears polling bit 2 in the register.

If only polling is to be used for conversion timing, an external

interrupt is not required and the INTR_PIN_Config register

should be programmed to 0x00. Polling of bit 2 in the INTR_

POLL_CLR register will return 0x00 if the conversion is not

complete, and 0x04 if complete. Once complete a 0x04 should

be written to the INTR_POLL_CLR register to clear bit 2, the

polled bit.

For acquisition, done after conversion, data needs to be latched

by writing 0x83 to the DATA_EN register. The purpose of

latching the data by the user is to provide a mechanism for data

to be coherent and under user control. Now, the data bank

conversion-acquisition cycle). The CLR bit (bit2) should be

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