FN6657 Rev 3.00

Page 13 of 16

October 28, 2014

ISL8201M

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close to the module as possible to minimize high frequency

noise.

• Use large copper areas for power path (VIN, PGND, VOUT)

to minimize conduction loss and thermal stress. Also, use

multiple vias to connect the power planes in different layers.

• Keep the trace connection to the feedback resistor short.

• Avoid routing any sensitive signal traces near the PHASE

node.

Thermal Considerations

Experimental power loss curves along with

modeling analysis can be used to evaluate the thermal

consideration for the module. The derating curves are derived

from the maximum power allowed while maintaining the

temperature below the maximum junction temperature of

+125°C. In actual application, other heat sources and design

margin should be considered.

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

0

68

10

LOAD CURRENT (A)

0.6V

1.5V

3.3V

2

4

0

2

4

6

8

10

12

60

70

80

90

100

110

AMBIENT TEMPERATURE (°C)

3.3V

1.5V

0.6V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

46

8

10

LOAD CURRENT (A)

02

4.0

0.6V

1.5V

2.5V

3.3V

5.0V

0

2

4

6

8

10

12

60

70

80

90

100

110

AMBIENT TEMPERATURE (°C)

5.0V

2.5V

3.3V

0.6V

1.5V