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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STV8216 数据表(PDF) 28 Page - STMicroelectronics |
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STV8216 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 97 page  I²S Interface STV82x6 28/97 6 I²S Interface A digital stereo input is available for a virtual Dolby source from an external decoder. A digital stereo output (I²S compatible) is available for routing the demodulated signal or a converted input audio signal into a Dolby Pro Logic Decoder or an external DAC. The STV82x6 I²S interface drives the serial bus (SCK, WS, SDO) in Master mode in format 32.fs with a sampling frequency (fS) of 32 kHz. An additional master clock (MCK) in format 256.fs (fS = 8.192 MHz) is provided if required for the slave interface. Both Philips and Sony modes are supported with programmable Word Selection (WS) polarity (register I2S). By default, all I²S digital outputs are set in high impedance and must be switched to low impedance via register CTRL before use. A clock system output (SYSCK) is also available for clock peripherals using the same quartz frequency as the STV82x6. By default, this clock output (identical to the crystal oscillator) is set to high impedance and must be switched to low impedance via register CTRL before use. |
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