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IMX6SLLCEC 数据表(PDF) 49 Page - NXP Semiconductors |
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IMX6SLLCEC 数据表(HTML) 49 Page - NXP Semiconductors |
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49 / 90 page  Electrical Characteristics i.MX 6SLL Applications Processors for Consumer Products, Rev. 0.2, 11/2017 NXP Semiconductors 49 4.10.6 Pulse Width Modulator (PWM) Timing Parameters This section describes the electrical information of the PWM. The PWM can be programmed to select one of three clock signals as its source frequency. The selected clock signal is passed through a prescaler before being input to the counter. The output is available at the pulse-width modulator output (PWMn_OUT) external pin (see external signals table in the i.MX 6SLL Reference Manual for PWM pin assignments). Figure 23 depicts the timing of the PWM, and Table 44 lists the PWM timing parameters. Figure 23. PWM Timing 4.10.7 LCD Controller (LCDIF) Parameters Figure 24 shows the LCDIF timing and Table 45 lists the timing parameters. Figure 24. LCD Timing Table 44. PWM Output Timing Parameters Reference Number Parameter Min Max Unit PWM Module Clock Frequency 0 66 MHz P1 PWM output pulse width high 15 — ns P2 PWM output pulse width low 9.1591 — ns |
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