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AD8209AWBRMZ-R7 数据表(PDF) 13 Page - Analog Devices |
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AD8209AWBRMZ-R7 数据表(HTML) 13 Page - Analog Devices |
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13 / 15 page ![]() Data Sheet AD8209A Rev. A | Page 13 of 15 GAIN TRIM Figure 31 shows a method for incremental gain trimming by using a trim potentiometer and an external resistor, REXT. The following approximation is useful for small gain ranges: ΔG ≈ (10 MΩ ÷ REXT)% For example, using this equation, the adjustment range is ±2% for REXT = 5 MΩ and ±10% for REXT = 1 MΩ. Figure 31. Incremental Gain Trimming Internal Signal Overload Considerations When configuring the gain for values other than 14, the maximum input voltage with respect to the supply voltage and ground must be considered because either the preamplifier or the output buffer reaches its full-scale output (VS − 0.1 V) with large differential input voltages. The input of the AD8209A is limited to (VS − 0.1) ÷ 7 for overall gains of ≤7 because the preamplifier, with its fixed gain of 7 V/V, reaches its full-scale output before the output buffer. For gains greater than 7, the swing at the buffer output reaches its full scale first and then limits the AD8209A input to (VS − 0.1) ÷ G, where G is the overall gain. LOW-PASS FILTERING In many transducer applications, it is necessary to filter the signal to remove spurious high frequency components, including noise, or to extract the mean value of a fluctuating signal with a peak to average ratio (PAR) greater than unity. For example, a full wave rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR of 2, and a half wave sinusoid has a PAR of 3.14. Signals with large spikes can have PARs of 10 or more. When implementing a filter, consider the PAR so that the output of the AD8209A preamplifier (A1) does not clip before A2; otherwise, the nonlinearity is averaged and appears as an error at the output. To avoid this error, both amplifiers clip at the same time. This condition is achieved when the PAR is no greater than the gain of the second amplifier (2 for the default configuration). For example, if a PAR of 5 is expected, increase the gain of A2 to 5. Low-pass filters can be implemented in several ways by using the features provided by the AD8209A. In the simplest case, a single-pole filter (20 dB/decade) is formed when the output of A1 is connected to the input of A2 via the internal 100 kΩ resistor by tying Pin 3 to Pin 4 and adding a capacitor from this node to ground, as shown in Figure 32. If a resistor is added across the capacitor to lower the gain, the corner frequency increases; therefore, calculate the gain using the parallel sum of the resistor and 100 kΩ. Figure 32. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor If the gain is raised using a resistor, as shown in Figure 30, the corner frequency is lowered by the same factor as the gain is raised. Therefore, using a resistor of 200 kΩ (for which the gain is doubled), results in a corner frequency scaled to 0.796 Hz/µF (0.039 µF for a 20 Hz corner frequency). Figure 33. Two-Pole, Low-Pass Filter A two-pole filter with a roll-off of 40 dB/decade can be implemented using the connections shown in Figure 33. This configuration is a Sallen-Key form based on a ×2 amplifier. A two-pole filter with a corner frequency of f2 and a single-pole filter with a corner frequency of f1 have the same attenuation, that is, 40 log (f2/f1), as shown in Figure 34. Using the standard resistor value shown in Figure 33 and capacitors of equal values, the corner frequency is conveniently scaled to 1 Hz/µF (0.05 µF for a 20 Hz corner frequency). A maximal flat response occurs when the resistor is lowered to 196 kΩ, scaling the corner frequency to GND DNC –IN +IN A1 VS A2 REXT OUT AD8209A 5V VDIFF VCM DNC = DO NOT CONNECT OUTPUT GAIN TRIM 20kΩ MIN + – + – GND DNC –IN +IN A1 VS A2 OUT AD8209A 5V VDIFF VCM CF DNC = DO NOT CONNECT OUTPUT fC = 1 2πC105 C IN FARADS + – + – GND DNC –IN +IN A1 VS A2 OUT AD8209A 5V VDIFF VCM C C DNC = DO NOT CONNECT OUTPUT fC(Hz) = 1/C(µF) 255kΩ + – + – |
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