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AD8317 数据表(PDF) 15 Page - Analog Devices |
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AD8317 数据表(HTML) 15 Page - Analog Devices |
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15 / 19 page ![]() Data Sheet AD8317 Rev. C | Page 15 of 19 Figure 33 shows the response of the AGC RF output to a pulse on VSET. As VSET decreases from 1.7 V to 0.4 V, the AGC loop responds with an RF burst. In this configuration, the input signal to the ADL5330 is a 1 GHz sine wave at a power level of −15 dBm. A CH1 2.48V T 699.800µs AD8317 VSET PULSE ADL5330 OUTPUT 2 1 T M10.0µs CH1 2.00V CH2 50mVΩ Figure 33. Oscilloscope Screenshot Showing the Response Time of the AGC Loop Response time and the amount of signal integration are con- trolled by CFLT. This functionality is analogous to the feedback capacitor around an integrating amplifier. Although it is possible to use large capacitors for CFLT, in most applications, values under 1 nF provide sufficient filtering. Calibration in controller mode is similar to the method used in measurement mode. A simple 2-point calibration can be done by applying two known VSET voltages or DAC codes and measuring the output power from the VGA. Slope and intercept can then be calculated by: Slope = (VSET1 − VSET2)/(POUT1 − POUT2) (9) Intercept = POUT1 − VSET1/Slope (10) VSETx = Slope × (POUTX − Intercept) (11) More information on the use of the ADL5330 in AGC applica- tions can be found in the ADL5330 data sheet. OUTPUT FILTERING For applications in which maximum video bandwidth and, consequently, fast rise time are desired, it is essential that the CLPF pin be left unconnected and free of any stray capacitance. The nominal output video bandwidth of 50 MHz can be reduced by connecting a ground-referenced capacitor (CFLT) to the CLPF pin, as shown in Figure 34. This is generally done to reduce output ripple (at twice the input frequency for a symmetric input waveform such as sinusoidal signals). +4 VOUT CLPF AD8317 3.5pF ILOG CFLT 1.5kΩ Figure 34. Lowering the Postdemodulation Bandwidth CFLT is selected by pF 5 . 3 ) kΩ 5 . 1 2 ( 1 Bandwidth Video C FLT (12) The video bandwidth must typically be set to a frequency equal to about one-tenth the minimum input frequency. This ensures that the output ripple of the demodulated log output, which is at twice the input frequency, is well filtered. In many log amp applications, it may be necessary to lower the corner frequency of the postdemodulation filter to achieve low output ripple while maintaining a rapid response time to changes in signal level. An example of a 4-pole active filter is shown in the AD8307 data sheet. OPERATION BEYOND 8 GHz The AD8317 is specified for operation up to 8 GHz, but it provides useful measurement accuracy over a reduced dynamic range of up to 10 GHz. Figure 35 shows the performance of the AD8317 over temperature at 10 GHz when the device is configured as shown in Figure 22. Dynamic range is reduced at this frequency, but the AD8317 does provide 30 dB of measurement range within ±3 dB of linearity error. 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 –40 –35 –30 –25 –20 –15 –10 –5 0 5 PIN (dBm) –5 –4 –3 –2 –1 0 1 2 3 4 5 Figure 35. VOUT and Log Conformance vs. Input Amplitude at 10.0 GHz, Multiple Devices, RTADJ = Open, CLPF = 1000 pF Implementing an impedance match for frequencies beyond 8 GHz can improve the sensitivity of the AD8317 and measure- ment range. Operation beyond 10 GHz is possible, but part-to-part variation, most notably in the intercept, becomes significant. |
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