cui.com

date 06/29/2018

│ page 2 of 10

CUI Inc

│ SERIES: AMT21 │ DESCRIPTION: MODULAR ABSOLUTE ENCODER

0x54 ReadSingle Turn Position

e

s

n

o

p

s

e

r

e

t

y

b

h

g

i

h

1

6

x

0

e

s

n

o

p

s

e

r

e

t

y

b

w

o

l

B

A

x

0

STOP

K1

K0

H5

5

STARTH2H3H4

H1

L1 L2 L3 L4 L5 L6 L7 STOP

H0

Command

67

Response

L0

0123

P

O

T

S

T

R

A

T

S

START

4

Read Single-Turn Configuration

Figure 1

AMT21 RS485 Interface

The AMT21 utilizes a half-duplex RS485 interface where the host sends a command over the differential bus at the proper

baud rate (default 2 Mbps), then the encoder takes control and responds. The host sends a single character using 8 bits, 1

stop bit, and no parity. The encoder responds with 14-bit position, and 2 check bits. It sends this as two bytes also using

8 bits, 1 stop bit, and no parity. The low byte comes first. 12-bit encoders use the same format but the lowest two bits are

zero.

Commands:

Read Single-Turn Position

Command char: T

Hex value: 0x54

RS485 INTERFACE

parameter

conditions/description

min

typ

max

units

protocol

RS485 balanced digital multi-port interface

data rate

8 data bits, no parity, 1 stop bit, asynchronous

2

4

Mbps

transceiver

Texas Instruments SN65HVD75

latency

time before encoder responds with position

18

29

µs

driver differential output

voltage magnitude

load resistance = 54 Ω

1.5

2

3.3

V

Values K1 and K0 in the response are checkbits. The checkbits are odd parity over the odd and even bits in the position

response shown in the equation below. The checkbits are not part of the position, but are used to verify its validity. The

lower 14 bits are the encoder position.

Full response: 0x61AB

14-bit position: 0x21AB (8619 decimal)

Checkbit Formula

Odd: K1 = !(H5^H3^H1^L7^L5^L3^L1)

Even: K0 = !(H4^H2^H0^L6^L4^L2^L0)

From the above response 0x61AB:

Odd: 0 = !(1^0^0^1^1^1^1) = correct

Even: 1 = !(0^0^1^0^0^0^1) = correct

For 12-bit applications L0 and L1 are always 0. Because the low two bits are 0, 12-bit data will need right-shifted two bits.

The checkbit calculation remains the same and unaffected.

For more information, please visit the product page.