X9241A

FN8164 Rev 7.00

Page 8 of 17

August 17, 2015

Detailed Operation

All four XDCP potentiometers share the serial interface and

share a common architecture. Each potentiometer is

comprised of a resistor array, a Wiper Counter Register and

four Data Registers. A detailed discussion of the register

organization and array operation follows.

Wiper Counter Register

The X9241A contains four volatile Wiper Counter Registers

(WCR), one for each XDCP potentiometer. The WCR can be

envisioned as a 6-bit parallel and serial load counter with its

outputs decoded to select one of sixty-four switches along its

resistor array. The contents of the WCR can be altered in four

ways: it may be written directly by the host via the Write WCR

instruction (serial load); it may be written indirectly by

transferring the contents of one of four associated Data

Registers via the XFR Data Register instruction (parallel load);

it can be modified one step at a time by the

increment/decrement instruction; finally, it is loaded with the

contents of its Data Register zero (DR0) upon power-up.

The WCR is a volatile register; that is, its contents are lost

when the X9241A is powered-down. Although the register is

automatically loaded with the value in DR0 upon power-up, it

should be noted this may be different from the value present at

power-down.

Data Registers

Each potentiometer has four nonvolatile Data Registers. These

can be read or written directly by the host and data can be

transferred between any of the four Data Registers and the

WCR. It should be noted all operations changing data in one of

these registers is a nonvolatile operation and will take a

maximum of 10ms.

If the application does not require storage of multiple settings

for the potentiometer, these registers can be used as regular

memory locations that could possibly store system parameters

or user preference data.

SERIAL DATA PATH

FROM INTERFACE

CIRCUITRY

REGISTER 0

REGISTER 1

REGISTER 2

REGISTER 3

SERIAL

BUS

INPUT

PARALLEL

BUS

INPUT

WIPER

COUNTER

REGISTER

INC/DEC

LOGIC

UP/DN

CLK

MODIFIED SCL

UP/DN

8

6

C

D

E

O

U

N

T

E

R

E

C

O

D

CASCADE

DW

CM

CONTROL

LOGIC

2

FIGURE 8. DETAILED POTENTIOMETER BLOCK DIAGRAM