| 数据搜索系统,热门电子元器件搜索 |
|
AD8128ACPZ-R7 数据表(PDF) 4 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8128ACPZ-R7 数据表(HTML) 4 Page - Analog Devices |
|
4 / 12 page ![]() AD8128 Data Sheet Rev. A | Page 4 of 12 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage ±5.5 V Input Voltage ±VS VPEAK and VGAIN Control Pins −3 V to +VS VOFFSET Control Pins ±VS Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +125°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type θJA θJC Unit 8-Lead LFCSP 77 14 °C/W Maximum Power Dissipation The maximum safe power dissipation in the AD8128 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temp- erature, the plastic changes the properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8128. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for the output. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the Airflow increases heat dissipation, effectively reducing θJA. Also, more metal directly in contact with the package leads from metal traces, through-holes, ground, and power planes reduces the θJA. The exposed pad on the underside of the package must be soldered to a pad on the PCB surface, which is thermally connected to a copper plane to achieve the specified θJA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8-lead LFCSP (48.5°C/W) on a JEDEC standard 4-layer board with the underside pad soldered to a pad that is thermally connected to a PCB plane. Extra thermal relief is required for operation at high supply voltages. 3.0 0 –30 –40 –10 –20 10 0 30 20 50 40 70 60 90 80 110 100 130 120 AMBIENT TEMPERATURE (°C) 2.5 2.0 1.5 1.0 0.5 Figure 2. Maximum Power Dissipation vs. Temperature ESD CAUTION |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |