Symbol

Parameter

Units

Min

Max

Maximum Clock Frequency

30

MHz

Propagation Delay

25

ns

25

Functional Description

The ’LS377 consists of eight edge-triggered D flip-flops with

individual D inputs and Q outputs The Clock (CP) and En-

able input (E) are common to all flip-flops

When E is LOW new data is entered into the register on the

next LOW-to-HIGH transition of CP When E is HIGH the

register will retain the present data independent of the CP

Truth Table

Inputs

Output

E

CP

H

X

X

No Change

L

L

HH

L

L

LL

Logic Symbol

TLF9831 – 2

Logic Diagram

TLF9831 – 3

3