Data Sheet

AD8260

Rev. B | Page 7 of 32

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VPSR

FDBK

PRAI

VMDO

VPOS

VPOS

TXOP

TXOP

PIN 1

INDICATOR

VMDO

NOTES

1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY.

FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND

MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED

THAT THE PAD BE SOLDERED TO THE GROUND PLANE.

THE GROUND PLANE PATTERN SHOULD INCLUDE A

PATTERN OF VIAS TO INNER LAYERS.

TXEN

VMDI

VNCM

VPSB

ENBL

VGAP

VGAN

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

VMDO

VMID Buffer Output. Requires robust ac decoupling with a capacitance of 0.1 μF capacitor or greater.

2

TXEN

Driver Enable. Logic threshold = 1.1 V with ±0.2 V hysteresis.

3

VMDI

VMID Input Voltage. Normally decoupled with a 0.1 μF capacitor. When pulled to VNCM, the VMID buffer shuts

down. This can be useful when using the part with dual supplies or when an external midpoint generator is used.

4

VNCM

Negative Supply for Bias Cell, VMID Cell, and Logic Inputs. (Ground this pin in applications.)

5

VPSB

Positive Supply for Bias Cell and VMID Cell.

6

ENBL

Enable. Logic threshold = 1.1 V. When low, the AD8260 is disabled and the supply current is 35 μA when TXEN

and all GNSx pins are also low.

7

VGAP

Positive VGA Output (Needs to Be Ac-Coupled for Single Supply).

8

VGAN

Negative VGA Output (Needs to Be Ac-Coupled for Single Supply).

VNGR

Negative Supply for Preamplifier and DGA (Set to −VPOS for Dual Supply; GND for Single Supply).

VPSR

Positive Supply for Preamplifier, DGA, and GNSx Logic Decoder.

11

GNS3

MSB for Gain Control. Logic threshold = 1.1 V.

12

GNS2

Gain Control Bit. Logic threshold = 1.1 V.

13

GNS1

Gain Control Bit. Logic threshold = 1.1 V.

14

GNS0

LSB for Gain Control. Logic threshold = 1.1 V.

15

PRAO

Preamplifier Output.

17

FDBK

Negative Input of Preamplifier.

18

PRAI

Positive Input of Preamplifier.

VPOS

Positive Supply for Driver Amplifier.

TXOP

Driver Output.

VNEG

Negative Supply for Driver Amplifier (Set to −VPOS for Dual Supply; GND for Single Supply).

27

TXFB

Feedback for Driver Amplifier.

28

INPN

Negative Driver Amplifier Input.

29

INRN

Negative Gain Resistor Input for Driver Amplifier.

30

INRP

Positive Gain Resistor Input for Driver Amplifier.

31

INPP

Positive Driver Amplifier Input.

32

VOCM

Output Common Mode Pin. Normally connected to Pin VMDO.

EPAD

Exposed Pad. The exposed pad is not connected internally. For increased reliability of the solder joints and

maximum thermal capability it is recommended that the pad be soldered to the ground plane. The ground plane

pattern should include a pattern of vias to inner layers.