SSM2518CBZ-R7 datasheet(28/48 Pages) AD

部件名	SSM2518CBZ-R7

功能描述	Digital Input Stereo, 2 W, Class-D Audio Power Amplifier

PDF	48 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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28 / 48 page

SSM2518

Datasheet

Rev. B | Page 28 of 48

SERIAL AUDIO INTERFACE AND SAMPLE RATE CONTROL REGISTER

Address: 0x02, Reset: 0x02, Name: Serial_Interface_Sample_Rate_Control

Table 15. Bit Descriptions for Serial_Interface_Sample_Rate_Control

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

[6:5]

SDATA_FMT

Serial Data Format. Only required if SAI = 000.

0x0

I²S standard; data is delayed by one BCLK cycle

Left justified

Right justified, 24-bit data

Right justified, 16-bit data

[4:2]

SAI

Serial Audio Interface Format.

0x0

000

I2S, left justified, or right justified stereo (depending on SDATA_FMT)

001

2-slot TDM

010

4-slot TDM

011

8-slot TDM

100

16-slot TDM

101

Mono PCM

110

Reserved

111

Reserved

[1:0]

Manual Sample Rate Selection. Only required if ASR = 1 in Register 0x01.

0x2

8 kHz to 12 kHz

16 kHz to 24 kHz

32 kHz to 48 kHz

64 kHz to 96 kHz

SSM2518CBZ-R7 数据表(PDF) 28 Page - Analog Devices

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