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TSS901EA/883 数据表(PDF) 14 Page - ATMEL Corporation

部件名 TSS901EA/883
功能描述  Tripple Point to Point IEEE 1355 High Speed Controller
PDF  31 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

TSS901EA/883 数据表(HTML) 14 Page - ATMEL Corporation

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14
TSS901E
Rev. C – 24-Aug-01
HOSTBIGE
I
1: host I/F Big Endian
0: host I/F Little Endian
BOOTLINK
I
1: control by link
0: control by host
CMCS(1:0)*
O/Z
Communication memory select lines. These pins are asserted
as chip selects for the corresponding banks of the
communication memory.
825
CMRD*
O/Z
Communication memory read strobe. This pin is asserted when
the TSS901E reads data from memory.
825
CMWR*
O/Z
Communication memory write strobe. This pin is asserted
when the TSS901E writes to data memory.
825
CMADR(15:0)
O/Z
Communication memory address. The TSS901E outputs an
address on these pins.
825
CMDATA(31:0)
IOZ
Communication memory data. The TSS901E inputs and
outputs data from and to com. memory on these pins.
350
COCI
I
Communication interface ’occupied’ input signal
3
50
COCO
O/Z
Communication interface ’occupied’ output signal
CAM
I
Communication interface arbitration master input signal
1: master
0: slave
CPUR*
O/Z
CPU Reset Signal
3
50
SES(3:0)*
O/Z
Specific External Signals
3
50
LDI1
I
Link Data Input channel 1
LSI1
I
Link Strobe Input channel 1
LDO1
O/Z
Link Data Output channel 1
12
25
LSO1
O/Z
Link Strobe Output channel 1
12
25
LEN1
O/Z
Link Enable Out (for external drivers)
3
50
LDI2
I
Link Data Input channel 2
LSI2
I
Link Strobe Input channel 2
LDO2
O/Z
Link Data Output channel 2
12
25
LSO2
O/Z
Link Strobe Output channel 2
12
25
LEN2
O/Z
Link Enable Out (for external drivers)
3
50
LDI3
I
Link Data Input channel 3
LSI3
I
Link Strobe Input channel 3
LDO3
O/Z
Link Data Output channel 3
12
25
LSO3
O/Z
Link Strobe Output channel 3
12
25
LEN3
O/Z
Link Enable Out (for external drivers)
3
50
TRST*
I
Test Reset. Resets the test state machine.
Signal Name
Type
Function
max. output
current [mA]
load [pF]



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