cui.com

date 05/08/2018

│ page 2 of 8

CUI Inc

│ SERIES: AMT23 │ DESCRIPTION: MODULAR ABSOLUTE ENCODER

SERIAL INTERFACE

parameter

conditions/description

min

typ

max

units

protocol

data rate

1

2

MHz

T

CLK

data shifted to output buffer

500

ns

T

DOV

time before data is valid

250

ns

T

CS

time between reads

1

µs

Notes:

1. All SSI signals are single ended. This interface uses a chip select signal for initiating position reads.

1

T

CLK

K1

D1

K0

D13

D5

D4

D3

D2

CHIP SELECT

CLOCK

DATA

1

K1

Positional Data Bits

T

CS

T

DOV

Figure 1

Timing Waveform

Values K1 and K0 in the response are checkbits. The checkbits are odd parity over the odd and even bits in the position

response shown in the equation below. The checkbits are not part of the position, but are used to verify its validity. The

lower 14 bits are the encoder position.

Example:

Full response: 0x61AB

14-bit position: 0x21AB (8619 decimal)

Checkbit Formula

Odd: K1 = !(H5^H3^H1^L7^L5^L3^L1)

Even: K0 = !(H4^H2^H0^L6^L4^L2^L0)

From the above response 0x61AB:

Odd: 0 = !(1^0^0^1^1^1^1) = correct

Even: 1 = !(0^0^1^0^0^0^1) = correct

Notes:

2. For 12-bit applications the clock can be stopped after 14 cycles, or if you clock the full 16 times L0 and L1 are always 0. Because the low two bits are 0, 12-bit data would

need right-shifted two bits. The checkbit calculation remains the same and unaffected.

For more information, please visit the product page.