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ADAU1761BCPZ-R7 数据表(PDF) 84 Page - Analog Devices |
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ADAU1761BCPZ-R7 数据表(HTML) 84 Page - Analog Devices |
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84 / 93 page  ADAU1761 Data Sheet Rev. D | Page 84 of 93 R58: Serial Input Route Control, 16,626 (0x40F2) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved SINRT[3:0] Table 83. Serial Input Route Control Register R59: Serial Output Route Control, 16,627 (0x40F3) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved SOUTRT[3:0] Table 84. Serial Output Route Control Register Bits Bit Name Description [3:0] SINRT[3:0] Serial data input routing. This register sets the input where the DACs receive serial data. This location can be from the DSP or from any TDM slot on the serial port. Setting Routing 0000 DSP to DACs [L, R] (default) 0001 Serial input [L0, R0] to DACs [L, R] 0010 Reserved 0011 Serial input [L1, R1] to DACs [L, R] 0100 Reserved 0101 Serial input [L2, R2] to DACs [L, R] 0110 Reserved 0111 Serial input [L3, R3] to DACs [L, R] 1000 Reserved 1001 Serial input [R0, L0] to DACs [L, R] 1010 Reserved 1011 Serial input [R1, L1] to DACs [L, R] 1100 Reserved 1101 Serial input [R2, L2] to DACs [L, R] 1110 Reserved 1111 Serial input [R3, L3] to DACs [L, R] Bits Bit Name Description [3:0] SOUTRT[3:0] Serial data output routing. This register sets the output where the ADCs send serial data. This location can be to the DSP or to any TDM slot on the serial port. Setting Routing 0000 ADCs [L, R] to DSP (default) 0001 ADCs [L, R] to serial output [L0, R0] 0010 Reserved 0011 ADCs [L, R] to serial output [L1, R1] 0100 Reserved 0101 ADCs [L, R] to serial output [L2, R2] 0110 Reserved 0111 ADCs [L, R] to serial output [L3, R3] 1000 Reserved 1001 ADCs [L, R] to serial output [R0, L0] 1010 Reserved 1011 ADCs [L, R] to serial output [R1, L1] 1100 Reserved 1101 ADCs [L, R] to serial output [R2, L2] 1110 Reserved 1111 ADCs [L, R] to serial output [R3, L3] |
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