USB2005 datasheet(12/21 Pages) SMSC

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USB2.0 ATA/ATAPI Controller with PD-DRM

Datasheet

Revision 0.2 (06-07-05)

SMSC USB2005

DATASHEET

5.1

Buffer Type Descriptions

RESET input

nRESET

This active low signal is used by the system to

reset the chip. The active low pulse should be

at least 100ns wide.

Test input

nTest[0:2]

These signals are used for testing the chip.

User should normally leave them unconnected.

For board continuity testing, all pads (except

RBIAS, FSDP, USBDP, USBDM, FSDM,

RTERM, XTAL1, XTAL2, LOOPFLTR and

nTEST[0:2]) are included in an XNOR chain

which is enabled by pulling nTEST2 low. nIOR

is the output of the chain (the chain begins at

pin 2) and will reflect the toggling of a signal

on each pin. Circuit board continuity of the pin

solder connections after assembly can be

checked in this manner

POWER, GROUNDS, AND NO CONNECTS

VDD

+2.5V Core power

VDDIO

+3.3V I/O power

VDDP

+2.5 Analog power

VSSP

Analog Ground Reference

VDDA

+3.3V Analog power

VSSA

Analog Ground Reference

GND

Ground Reference

No Connect. These pins should not be

connected externally.

Table 5.2 USB2005 Buffer Type Descriptions

BUFFER

DESCRIPTION

Input

Input with Schmitt trigger

Input with weak pull-up

IO8

Input/Output with 8 mA drive

Output with 8mA drive

O12

Output with 12mA drive

IO12PU

Input/Output with 12 ma drive and controlled weak pull up

IO12

Input/Output with 12 ma drive

IO20

Input/output with 20mA drive

O20

Output with 20mA drive

O20PU

Output with 20mA drive and weak pullup

Table 5.1 USB2005 Pin Descriptions (continued)

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