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ICS854057 数据表(PDF) 9 Page - Integrated Circuit Systems |
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ICS854057 数据表(HTML) 9 Page - Integrated Circuit Systems |
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9 / 13 page ![]() 854057AG www.icst.com/products/hiperclocks.html REV. A JULY 18, 2005 9 Integrated Circuit Systems, Inc. ICS854057 4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION LVPECL INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω TERMINATIONS INTERFACE The PCLK /nPCLK with built-in 50 Ω terminations accepts LVDS, LVPECL, LVHSTL, CML, SSTL and other differential signals. Both VSWING and VOH must meet the V PP and VCMR input requirements. Figures 3A to 3E show interface examples for the HiPerClockS PCLK/nPLCK input with built-in 50 Ω terminations driven by the most common driver types.The input interfaces suggested here are examples only. If the driver is from another vendor, use their termination recommendation. Please consult with the vendor of the driver component to confirm the driver termination requirements. FIGURE 3A. HIPERCLOCKS PCLK/nPCLK INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω DRIVEN BY AN LVDS DRIVER FIGURE 3B. HIPERCLOCKS PCLK/nPCLK INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω DRIVEN BY AN LVPECL DRIVER IN nIN VT 2.5V LVDS 3.3V or 2.5V Zo = 50 Ohm Zo = 50 Ohm Receiver With Built-In 50 Ohm Zo = 50 Ohm Receiver With Built-In 50 Ohm Zo = 50 Ohm IN nIN VT 2.5V 2.5V R1 18 2.5V LVPECL FIGURE 3E. HIPERCLOCKS PCLK/nPCLK INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω DRIVEN BY AN SSTL DRIVER FIGURE 3C. HIPERCLOCKS PCLK/nPCLK INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω DRIVEN BY AN OPEN COLLECTOR CML DRIVER FIGURE 3D. HIPERCLOCKS PCLK/nPCLK INPUT WITH BUILT-IN 50 Ω Ω Ω Ω Ω DRIVEN BY A CML DRIVER WITH BUILT-IN 50 Ω Ω Ω Ω Ω PULLUP Zo = 50 Ohm 2.5V Zo = 50 Ohm IN nIN VT Receiver With Built-In 50 Ohm 2.5V CML - Open Collector IN nIN VT Receiver With Built-In 50 Ohm 2.5V Zo = 50 Ohm Zo = 50 Ohm CML - Built-in 50 Ohm Pull-up 2.5V 2.5V 2.5V SSTL R1 25 R2 25 IN VT nIN Receiver With Built-In 50 Ω Zo = 50 Ohm Zo = 50 Ohm |
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