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MMPF0100Z 数据表(PDF) 13 Page - NXP Semiconductors |
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MMPF0100Z 数据表(HTML) 13 Page - NXP Semiconductors |
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13 / 128 page ![]() NXP Semiconductors 13 PF0100Z GENERAL PRODUCT CHARACTERISTICS Figure 4. Current overtemperature waveforms Standby MMPF0100AZ VSNVS from either VIN or LICELL SW1A/B combined in PFM SW1C in PFM SW2 in PFM SW3A/B combined in PFM SW4 in PFM SWBST off Trimmed 16 MHz RC enabled Trimmed reference active VGEN1-6 enabled VREFDDR enabled TA = -40 °C to 85 °C TA = -40 °C to 105 °C No load on VSNVS. Processor enabled in low power mode. All rails powered on except boost (load = 0 mA) 297 297 450 550 μA (18) Notes 16. Refer to Figure 4 for coin cell mode characteristics over temperature. 17. When VIN is below the UVDET threshold, in the range of 1.8 V ≤ VIN < 2.65 V, the quiescent current increases by 50 μA, typically. 18. For PFM operation, headroom should be 300 mV or greater. 19. From 0 °C to 85 °C 20. From -40 °C to 85 °C 21. Additional current may be drawn in the coin cell mode when RESETBMCU is pulled up to VSNVS due an internal path from RESETBMCU to VIN. The additional current is <30 μA with a pull up resistor of 100 kΩ. The i.MX 6x processors have an internal pull up from the POR_B pin to the VDD_SNVS_IN pin. For i.MX 6x applications, if additional current in the coin cell mode is not desired, use an external switch to disconnect the RESETBMCU path when VIN is removed. For non-i.MX 6 applications, pull-up RESETBMCU to a rail that is off in the coin cell mode. Table 8. Current consumption summary (continued) PF0100Z TA = -40 °C to 85 °C, PF0100AZ TA = -40 °C to 105 °C, VIN = 3.6 V, VDDIO = 1.7 V to 3.6 V, LICELL = 1.8 V to 3.3 V, VSNVS = 3.0 V, typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VDDIO = 3.3 V, LICELL = 3.0 V, VSNVS = 3.0 V and 25 °C, unless otherwise noted. Coin cell mode 1 10 100 -40 -20 0 20406080 Temperature (oC) MMPF0100 MMPF0100A Temperature (°C) |
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