UC3842A/3843A

LINEAR INTEGRATED CIRCUIT

UNISONIC TECHNOLOGIES CO., LTD

5 of 9

www.unisonic.com.tw

QW-R103-002.I



OPEN -LOOP LABORAT ORY T EST FI X T U RE

High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass

capacitors should be connected close to Pin 5 in single point GND. The transistor and 5k

Ω potentio-meter are used

to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.



U N DER-V OLT AGE LOCK OU T

During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to

GND with a bleeder resistor to prevent activating the power switch with output leakage currents.

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ERROR AM PLI FI ER CON FI GU RAT I ON

2

1

0.5mA

2.5V

Zf

Zi

Error amplifier can source or sink up to 0.5mA