HMC856

Data Sheet

Rev. D | Page 10 of 13

THEORY OF OPERATION

The HMC856 is a wideband time delay device with a 5-bit digital

control designed for timing compensation or clock skew

management applications. The HMC856 operates from a single

−3.3 V supply and is available in a 5 mm × 5 mm LCC package.

The HMC856 can support data rates up to 28 Gbps and is able

to provide 100 ps variable delay with 3 ps resolution. The total

propagation delay of the HMC856 varies between 250 ps and

350 ps. The maximum achievable bandwidth of the HMC856

depends on the power of the input signal. The highest

bandwidth of the device is at the larger input power levels, as

shown in Figure 23.

The HMC856 uses a CML interface, which uses 50 Ω internal

terminations to the ground. The input and output pins can be

interfaced with either ac or dc coupling. For ac coupling, using a

series resistor, which is effectively short circuit, and an ac load of

50 Ω is recommended. For dc coupling, inputs and outputs can be

directly interfaced with another CML circuit. The control lines, B4

to B0, are also CML, but they are terminated with 600 Ω to the

positive rail for low power operation.

The HMC856 features an output level control pin, VR, that

allows loss compensation or signal level optimization. VR can

have a voltage value between −1.2 V and 0.4 V, which results in

a differential output swing of 500 mV p-p and 1350 mV p-p.

Increasing the output swing affects the rise and fall times. As

VR becomes higher, the rise and fall times increase. Changing

the VR pin also changes the power dissipation because the

HMC856 can consume between 140 mA and 200 mA at room

temperature depending on the VR pin.