STM705 datasheet(10/27 Pages) STMICROELECTRONICS

10 / 27 page

STM705/706/707/708/813L

10/27

Ensuring a Valid Reset Output Down to

VCC =0V

When VCC falls below 1V, the state of the RST out-

put can no longer be guaranteed, and becomes

essentially an open circuit. If a high value pull-

down resistor is added to the RST pin, the output

will be held low during this condition. A resistor val-

ue of approximately 100k

Ω will be large enough to

not load the output under operating conditions, but

still sufficient to pull RST to ground during this low

voltage condition (see Figure 11).

Figure 11. Reset Output Valid to Ground

Circuit

Interfacing to Microprocessors with Bi-

directional Reset Pins

Microprocessors with bi-directional reset pins can

contend with the STM705-708 reset output. For

example, if the reset output is driven high and the

micro wants to pull it low, signal contention will re-

sult. To prevent this from occurring, connect a

4.7k

Ω resistor between the reset output and the

micro’s reset I/O as in Figure 12.

Figure 12. Interfacing to Microprocessors with

Bi-directional Reset I/O

AI08835

STMXXX

RST

AI08836

STMXXX

RST

GND

4.7k

VCC

Microprocessor

RST

Buffered Reset to other

System Components

GND

VCC

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