ADF4153A

Data Sheet

Rev. A | Page 2 of 24

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Specifications .................................................................. 4

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Pin Configurations and Function Descriptions ........................... 6

Typical Performance Characteristics ............................................. 7

Circuit Description........................................................................... 8

Reference Input Section............................................................... 8

RF Input Stage............................................................................... 8

RF INT Divider............................................................................. 8

INT, FRAC, MOD, and R Relationship ..................................... 8

RF R Counter ................................................................................ 8

Phase Frequency Detector (PFD) and Charge Pump.............. 9

MUXOUT and Lock Detect........................................................ 9

Input Shift Registers..................................................................... 9

Program Modes ............................................................................ 9

Register Maps.................................................................................. 10

N Divider Register, R0............................................................... 15

R Divider Register, R1................................................................ 15

Control Register, R2................................................................... 15

Noise and Spur Register, R3...................................................... 16

Reserved Bits............................................................................... 16

Initialization Sequence .............................................................. 17

RF Synthesizer: A Worked Example........................................ 17

Modulus....................................................................................... 17

Reference Doubler and Reference Divider ............................. 17

12-Bit Programmable Modulus................................................ 17

Fastlock with Spurious Optimization...................................... 18

Spur Mechanisms ....................................................................... 18

Spur Consistency........................................................................ 19

Phase Resync............................................................................... 19

Filter Design—ADIsimPLL....................................................... 19

Interfacing ................................................................................... 19

PCB Design Guidelines for Chip Scale Package .................... 20

Applications Information .............................................................. 21

Local Oscillator for a GSM Base Station Transmitter ........... 21

Outline Dimensions....................................................................... 22

Ordering Guide .......................................................................... 22

REVISION HISTORY

1/13—Rev. 0 to Rev. A

Added TSSOP Package ......................................................Universal

Added Figure 3, Renumbered Sequentially ...................................6

Updated Outline Dimensions........................................................22

Changes to Ordering Guide ...........................................................22

10/12—Revision 0: Initial Version