TPS16632RGER datasheet(4/30 Pages) TI1

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TPS1663

SLVSET9A – SEPTEMBER 2018 – REVISED OCTOBER 2018

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Pin Functions

TYPE

DESCRIPTION

NAME

TPS16630

TPS16632

VQFN

HTSSOP

VQFN

dVdT

I/O

A capacitor from this pin to GND sets output voltage slew rate.

Leaving this pin floating enables device power up in thermal

regulation resulting in fast output charge. See the Hot Plug-In and In-

Rush Current Control section

FLT

Fault event indicator. It is an open drain output. If unused, leave

floating or connect to GND

GND

—

Connect GND to system ground

ILIM

I/O

A resistor from this pin to GND sets the overload and short-circuit

current limit. See the Overload and Short Circuit Protection section

Power input. Connects to the DRAIN of the internal FET

IMON

Analog current monitor output. This pin sources a scaled down ratio

of current through the internal FET. A resistor from this pin to GND

converts current to proportional voltage. If unused, leave it floating

MODE

Mode selection pin for over load fault response. See the Device

Functional Modes section

N.C

—

No Connect

—

OUT

Power output of the device

OVP

—

Input for setting the programmable overvoltage protection threshold

(For TPS16630 Only). An overvoltage event turns off the internal

FET and asserts FLT to indicate the overvoltage fault.

PGOOD

Active High. A high that the internal FET is enhanced. PGOOD goes

low when the internal FET is turned OFF during a fault or when

SHDN is pulled low. If PGOOD is unused then connect to GND or

leave it floating

P_IN

Supply voltage of the device. Connect P_IN to IN directly

PLIM

—

Input for setting the programmable output power limiting threshold

(TPS16632 Only). Connect a resistor across PLIM to GND to set the

output power limit. Connect PLIM to GND if PLIM feature is not

used. See the Output Power Limiting, PLIM (TPS16632 Only)

section.

SHDN

Shutdown pin. Pulling SHDN low makes the device to enter into low

power shutdown mode. Cycling SHDN pin voltage resets the device

that has latched off due to a fault condition

UVLO

Input for setting the programmable undervoltage lockout threshold.

An undervoltage event turns off the internal FET and asserts FLT to

indicate the power-failure.

PowerPadTM

—

Connect PowerPad to GND plane for heat sinking. Do not use

PowerPad as the only electrical connection to GND

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