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AD5142ABCPZ10-RL7 数据表(PDF) 12 Page - Analog Devices |
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AD5142ABCPZ10-RL7 数据表(HTML) 12 Page - Analog Devices |
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12 / 32 page ![]() AD5122A/AD5142A Data Sheet Rev. B | Page 12 of 32 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS GND A1 W1 B1 SCL SDA VLOGIC VDD 12 11 10 1 3 4 9 2 PIN 1 INDICATOR NOTES 1. EXPOSED PAD. CONNECT THE EXPOSED PAD TO THE POTENTIAL OF THE VSS PIN, OR, ALTERNATIVELY, LEAVE IT ELECTRICALLY UNCONNECTED. IT IS RECOMMENDED THAT THE PAD BE THERMALLY CONNECTED TO A COPPER PLANE FOR ENHANCED THERMAL PERFORMANCE. AD5122A/ AD5142A TOP VIEW (Not to Scale) Figure 4. 16-Lead LFCSP Pin Configuration Table 7. 16-Lead LFCSP Pin Function Descriptions Pin No. Mnemonic Description 1 GND Ground Pin, Logic Ground Reference. 2 A1 Terminal A of RDAC1. VSS ≤ VA ≤ VDD. 3 W1 Wiper Terminal of RDAC1. VSS ≤ VW ≤ VDD. 4 B1 Terminal B of RDAC1. VSS ≤ VB ≤ VDD. 5 VSS Negative Power Supply. Decouple this pin with 0.1 μF ceramic capacitors and 10 μF capacitors. 6 A2 Terminal A of RDAC2. VSS ≤ VA ≤ VDD. 7 W2 Wiper Terminal of RDAC2. VSS ≤ VW ≤ VDD. 8 B2 Terminal B of RDAC2. VSS ≤ VB ≤ VDD. 9 VDD Positive Power Supply. Decouple this pin with 0.1 μF ceramic capacitors and 10 μF capacitors. 10 VLOGIC Logic Power Supply; 1.8 V to VDD. Decouple this pin with 0.1 μF ceramic capacitors and 10 μF capacitors. 11 SCL Serial Clock Line. 12 SDA Serial Data Input/Output. 13 ADDR1 Programmable Address (ADDR1) for Multiple Package Decoding. 14 ADDR0 Programmable Address (ADDR0) for Multiple Package Decoding. 15 INDEP Linear Gain Setting Mode at Power-Up. Each string resistor is loaded from its associated memory location. If INDEP is enabled, it cannot be disabled by the software. 16 RESET Hardware Reset Pin. Refresh the RDAC registers from EEPROM. RESET is activated at logic low. If this pin is not used, tie RESET to VLOGIC. EPAD Exposed Pad. Connect this exposed pad to the potential of the VSS pin, or, alternatively, leave it electrically unconnected. It is recommended that the pad be thermally connected to a copper plane for enhanced thermal performance. |
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