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AM6546 数据表(PDF) 7 Page - Texas Instruments |
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AM6546 数据表(HTML) 7 Page - Texas Instruments |
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7 / 299 page  7 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Revision History Copyright © 2017–2018, Texas Instruments Incorporated 2 Revision History Changes from July 1, 2018 to October 5, 2018 (from D Revision (July 2018) to E Revision) Page • Updated EMIF references to DDRSS in Section 1.1, Features ................................................................ 1 • Updated DDR addressable space to 32GB in Section 1.1, Features .......................................................... 1 • Removed DDR Dual Rank references from Section 1.1, Features ............................................................ 1 • Added AM6527 part number in Device Information .............................................................................. 4 • Added AM6527 part number in Table 3-1, Device Comparison ................................................................ 8 • Added DEVICE_ID to Table 3-1, Device Comparison ........................................................................... 8 • Updated EMIF references to DDRSS in Table 3-1, Device Comparison ...................................................... 8 • Updated DDR addressable space to 32GB in Table 3-1, Device Comparison ............................................... 8 • Updated SERDES and USB power supplies in Table 4-1, Pin Attributes ................................................... 10 • Updated EMIF references to DDRSS throughout Section 4.3, Signal Descriptions ........................................ 64 • Updated MCAN Signal Descriptions in Table 4-35, MCAN0 Signal Descriptions and Table 4-36, MCAN1 Signal Descriptions .......................................................................................................................... 78 • Updated MCU_BOOTMODE[8:3] instructions in Table 4-65, Sysboot Signal Descriptions ............................... 98 • Added clarification note to VDDA_POR_WKUP in Table 4-74, Power Supply Signal Description ..................... 101 • Updated MMC/SD I/F cap recommendations in Table 4-74 ................................................................. 101 • Updated Connections for Unused Pins Table 4-76 ........................................................................... 115 • Added parameters to Recommended Operating Conditions and Absolute Maximum Ratings tables ................. 116 • Added AM6527 part number to Table 5-1 Speed Grade Maximum Frequency ........................................... 121 • Removed DDR Buffers DC Electrical Characteristics table .................................................................. 122 • Updated I2C OPEN DRAIN DC Electrical Characteristics table ............................................................ 122 • Added min frequency value to ADC Electrical Characteristics table ........................................................ 124 • Removed LJCB CLK Buffers DC Electrical Characteristics .................................................................. 125 • Updated Table 5-9, LVCMOS Buffers DC Electrical Characteristics ....................................................... 126 • Added LVCMOS-FS DC Electrical Characteristics table in Section 5.7, Electrical Characteristics .................... 128 • Updated EMIF references to DDRSS in Section 5.11.4.3, PLLs ........................................................... 151 • Updated LVDSRX Timing Requirements table ............................................................................... 154 • Updated MDIO Peripheral Timings ............................................................................................. 154 • Updated RGMII timing parameters in Table 5-37 and Table 5-115; Re-worded note A. under Figure 5-33 .......... 158 • Updated DDR addressable space to 32GB ................................................................................... 159 • Updated eCAP, eHRPWM, eQEP timing sections ............................................................................ 161 • Updated GPIO Timing Requirements and Switching Characteristics values .............................................. 164 • Updated HYPERBUS timing section ............................................................................................ 187 • Updated I2C output switching characteristic values ........................................................................... 190 • Updated MCSPI timing section values .......................................................................................... 195 • Updated MMC0 timing section parameters .................................................................................... 203 • Updated MMC1 timing section parameters .................................................................................... 209 • Removed propagation delay notes from Table 5-89 and Table 5-90 ....................................................... 215 • Added additional paragraphs about specification revisions to USB and PCIe timing sections .......................... 218 • Added note to Section 5.11.5.21.6.3, PRU_ICSSG MII_RT Electrical Data and Timing ................................. 230 • Removed References to OpenGL ............................................................................................... 242 • Changed PRU0_IRAM and PRU1_IRAM size from 16KB to 12KB in Section 6.6, PRU-ICSSG ....................... 244 • Remove DDR Dual Rank references from Section 6 ......................................................................... 257 • Removed HS400 feature from MMC/SD detailed descriptions .............................................................. 272 • Added content to Section 7.1, DDR Board Design and Layout Guidelines ................................................ 281 • Added Section 7.2, OSPI Board Design and Layout Guidelines ............................................................ 281 • Added content to Section 7.5, Power Distribution Network Implementation Guidance ................................... 285 • Updated the MMC/SD section in Figure 7-5, External decoupling capacitor connections .............................. 285 • Updated Section 7.6.1, LVCMOS External Capacitor Connections ........................................................ 287 • Added content to Section 7.7, Thermal Solution Guidance .................................................................. 290 • Added AM6527 part number inTable 8-1, Nomenclature Description ...................................................... 292 • Added note about prototype part number ...................................................................................... 293 • Removed References to OpenGL ............................................................................................... 294 |
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