AD9780/AD9781/AD9783

Data Sheet

Rev. C | Page 2 of 32

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Functional Block Diagram .............................................................. 1

Table of Contents .............................................................................. 2

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DC Specifications ......................................................................... 3

Digital Specifications ................................................................... 4

AC Specifications.......................................................................... 5

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution.................................................................................. 6

Pin Configurations and Function Descriptions ........................... 7

Typical Performance Characteristics ........................................... 10

Terminology .................................................................................... 18

Theory of Operation ...................................................................... 19

Serial Peripheral Interface ......................................................... 19

General Operation of the Serial Interface............................... 19

Instruction Byte .......................................................................... 19

MSB/LSB Transfers .................................................................... 20

Serial Interface Port Pin Descriptions ..................................... 20

SPI Register Map ............................................................................ 21

SPI Register Descriptions .............................................................. 22

SPI Port, RESET, and Pin Mode ............................................... 24

Parallel Data Port Interface ........................................................... 25

Optimizing the Parallel Port Timing ....................................... 25

BIST Operation........................................................................... 27

Driving the CLK Input .............................................................. 27

Full-Scale Current Generation ................................................. 28

DAC Transfer Function ............................................................. 28

Analog Modes of Operation ..................................................... 28

Power Dissipation....................................................................... 30

Outline Dimensions ....................................................................... 31

Ordering Guide .......................................................................... 31

REVISION HISTORY

8/2017—Rev. B to Rev. C

Changes to Table 12........................................................................ 22

6/2012—Rev. A to Rev. B

Changes to Table 2............................................................................ 4

Changes to Pins 25, 26, 29, and 30 Description, Table 6............. 7

Changes to Pins 9 to 24, 31 to 42, 25, 26, 29, and 30 Description,

Table 7 ................................................................................................ 8

Changes to Pins 25, 26, 29, and 30 Description, Table 7............. 9

Changes to SEEK Bit Function Description, Table 12............... 22

Changes to Parallel Data Port Interface Section......................... 25

Added BIST Operation Section .................................................... 27

Changes to Driving the CLK Input Section and Figure 59 ....... 27

Removed Evaluation Board Schematics Section ........................ 31

Updated Outline Dimensions ....................................................... 31

Changes to Ordering Guide .......................................................... 31

6/2008—Rev. 0 to Rev. A

Changed Maximum Sample Rate to 500 MHz Throughout .......1

Changes to Table 3.............................................................................4

Changes to Building the Array Section ....................................... 25

Changes to Determining the SMP Value Section ...................... 25

Added Evaluation Board Schematics Section............................. 30

Updated Outline Dimensions....................................................... 35

11/2007—Revision 0: Initial Version